SambaNova is a leader in next-generation AI infrastructure, providing a full-stack inference platform for customers worldwide. Its Reconfigurable Dataflow Unit (RDU) is a chip built on a dataflow architecture, and RDUs are packaged into SambaRack rack-scale hardware. The Design Verification team verifies the RDU and builds SystemVerilog and UVM environments for chip-level control and initialization, including sequencing, state transitions, clocking, and recovery. The team works with architects, RTL designers, and firmware engineers. As a new graduate Design Verification Engineer, you will develop tests, testbenches, checkers, and coverage in SystemVerilog and UVM for RDU features. You will run regressions, debug simulation failures, and collaborate with RTL designers to identify and fix bugs before tape-out.
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Job Type
Full-time
Career Level
Entry Level