Emulation Performance/Debug Engineer

QualcommSan Diego, CA
$121,800 - $182,600

About The Position

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. Qualcomm's Emulation Team is part of the central SoC digital hardware organization responsible for the overall development and support of SoC pre-silicon platforms. The Emulation team works closely with architects, designers, verification engineers, software engineers, and customers. The team is currently seeking candidates with experience in the following technical disciplines, languages, and methodologies: Emulation Platforms (FPGA Prototyping, Veloce, Palladium), Emulation tools (Synthesis, Place and Route, Constraints, Clocking, Timing Closure), System Debug (Waveform generation and Content Debug support) SoC Functionality (CPU/DSP Core, Multimedia, IO, Peripherals, DDR, Modem, Bus Protocols)

Requirements

  • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field.
  • 5+ years of experience working in emulation and silicon environments.
  • Debug tools including JTAG and kernel debuggers
  • CPU and SoC architectures, with solid understanding of SoC building blocks (interconnects, power management, PMIC, NoC, peripherals)
  • Basic understanding of power and performance
  • Expertise in Verilog / SystemVerilog
  • Experience with C programming
  • Scripting: Proficient in Python, TCL
  • FPGA Expertise: Xilinx/Intel FPGAs, Tools, and timing closure techniques

Nice To Haves

  • Emulation Platforms (FPGA Prototyping, Veloce, Palladium)
  • Emulation tools (Synthesis, Place and Route, Constraints, Clocking, Timing Closure)
  • System Debug (Waveform generation and Content Debug support)
  • SoC Functionality (CPU/DSP Core, Multimedia, IO, Peripherals, DDR, Modem, Bus Protocols)

Responsibilities

  • Design, development, and deployment of uniform global methodologies for emulation build generation and debug across FPGA based emulation platforms of various configurations
  • Cross-site collaboration, vendor engagements, and executive communication
  • Pre-silicon prototyping for new SoC designs, including pre-silicon enablement and bring-up
  • Bring-up of new FPGA emulation/prototyping hardware and software
  • Debugging low level software and hardware issues
  • Validation and debug of digital circuits

Benefits

  • competitive annual discretionary bonus program
  • opportunity for annual RSU grants
  • highly competitive benefits package
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