Distinguished Engineer (DE) or Senior Director, Central Engineering – SoC Design & Modeling Methodologies
About The Position
This position leads workload and performance analysis, hardware/software (HW/SW) optimization and co-design—including AI workloads—and SoC architecture. It covers workload characterization, solution integration, performance and power tradeoffs, advanced SoC architecture, modeling methodologies, and design enablement strategies across multiple product lines. The role partners with product groups, platform teams, and executive leadership to define and analyze products and SoCs, and to co-optimize them with next-generation design methodologies that accelerate innovation and enable reuse across the organization. The ideal candidate is a recognized technical leader with deep expertise in workload and performance analysis, AI workloads, HW/SW co-design, and SoC architecture. The position provides technical and organizational leadership across engineering disciplines and helps influence long-term semiconductor technology and platform strategy.
Requirements
- MS or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline; a Ph.D. is highly desired.
- 15+ years of experience in semiconductor or SoC development.
- 8+ years of technical leadership experience.
- Proven experience leading performance and workload analysis and HW/SW co-optimization.
- Strong understanding of performance analysis, workload analysis, AI workloads, SoC architecture and integration, digital design methodologies, IP and subsystem development, hardware/software co-design, and SoC verification methodologies.
- Hands-on experience with performance and workload benchmarking, virtual platforms and executable specifications, SoC performance modeling, and design and verification automation flows.
Nice To Haves
- Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
- Experience in platform design and translating customer-facing requirements into system-level requirements.
Responsibilities
- Define and drive the strategic roadmap for workload and performance analysis for IPs and products across the company.
- Lead architecture performance reviews and set technical direction for complex IP, SoC, and subsystem developments.
- Establish best practices for hardware/software co-design and model-based development.
- Provide technical leadership for cross-functional teams spanning architecture, design, verification, emulation, and software.
- Define and analyze AI workloads and the performance required for them.
- Build and lead high-performing engineering teams.
- Mentor directors, principal engineers, and distinguished engineers.
- Foster collaboration across Central Engineering, Product Groups, and external partners.
- Influence long-term semiconductor technology and platform strategy.
- Partner with product groups, platform teams, and executive leadership to define and analyze products and SoCs for performance and workload analysis, and co-optimize them using next-generation design methodologies.
Benefits
- Competitive benefits package alongside salary; further information will be provided during the hiring process.
Stand Out From the Crowd
Upload your resume and get instant feedback on how well it matches this job.
What This Job Offers
Job Type
Full-time
Career Level
Senior
