Sr Director - DfT, Test Development, HW Roadmap

GlobalFoundries•Richardson, TX
•$214,000 - $356,000

About The Position

The Director of DfT and ATE HW Design leads a team of DfT, test, and ATE hardware design engineers. The role defines and oversees implementation of design-for-test (DfT) and built-in self-test (BiST) techniques and methods to improve test coverage and quality, maximize multisite testing, and reduce cost of test across digital, analog, mixed-signal, memory, high-speed I/O, RF intellectual property, and systems-on-chip. It also supports ATE hardware designs for wafer sort and final package test, and defines requirements for future ATE tester roadmaps based on product roadmaps and definitions. The position defines DfT and BiST methodologies, production test flows, test methods, test libraries, and characterization requirements. It sets ATE hardware strategy for probe and final test, and oversees integration, validation, qualification, and factory buyoff of ATE hardware solutions, including handlers, probers, and sockets. The role works across product, design, DfT, process and product development, and factory teams to enable high-volume production and drive better processes, test methods, and cost reduction.

Requirements

  • MSEE or BSEE.
  • At least 15–20 years of experience working in product or test.
  • At least 10 years of experience with DfT and BiST strategies across digital, RF, and analog/mixed-signal products.
  • At least 10 years of management experience.
  • Experience with ATE platforms and defining ATE roadmap solutions, including full test cell definitions.
  • A strong track record of enabling and bringing multiple products and technologies into high-volume production.
  • Excellent communication and leadership skills, including experience working with cross-functional teams across internal development and factory sites.
  • Understanding of product financial metrics and terms, with a proven track record of driving cost-reduction activities.
  • Strong knowledge of factory operations, assembly, and test operations.
  • Good IC and test knowledge across digital, analog, and mixed-signal technologies, including ATE platforms, DfT strategies, test methods, and instrumentation requirements.
  • Familiarity with protocols and industry standards for IPs, including high-speed interfaces and analog and mixed-signal circuits.
  • Prior DfT and ATE test equipment experience for IC testing, with hands-on knowledge across digital, analog, and RF.

Nice To Haves

  • Knowledge of high-speed interfaces such as PCIe, LVDS, CSI, DSI, QSPI, DDR, HDMI, and USB; power management; massive multisite testing; and/or IPs requiring safety and security.
  • Project management skills, including the ability to innovate, execute on solutions, and navigate ambiguity.
  • Strong written and verbal communication skills.
  • Strong planning and organizational skills.

Responsibilities

  • Lead a team of DfT, test, and ATE hardware design engineers.
  • Define and oversee DfT and BiST techniques and methods for digital, analog, mixed-signal, memory, high-speed I/O, and RF IPs and SoCs, focusing on coverage, quality, multisite capability, and low cost of test.
  • Drive test methods, test flows, and quality screens for different NVM memory types.
  • Define new ATE platforms to support product roadmaps spanning five to ten years.
  • Define and develop Test Method Libraries to standardize methods across products and ATE platforms.
  • Learn applicable protocols and industry standards for high-speed interfaces, define high-volume production test methods with high parallelism, and build or code ATE test plans for characterization and production testing.
  • Own DfT definitions for both IPs and SoCs.
  • Define production test flows across test insertions to achieve strong coverage and low cost of test.
  • Define process and silicon characterization requirements for NPDE teams to use during product validation and execution.
  • Set ATE hardware strategy for probe and final test, including integration, validation, qualification, and factory buyoff of ATE hardware solutions such as handlers, probers, and sockets.
  • Serve as liaison between BU PE and the factory for validation of hardware and software at factory-installed test cells, including temperature test capabilities.
  • Identify and document gaps, best practices, and lessons learned, and provide feedback to Design, DfT, and PE NPDE/Cost Entitlement teams.
  • Work closely with cross-functional Design, Design DfT, and NPDE PE teams to direct, guide, and influence product development.
  • Perform activities safely and responsibly, and support Environmental, Health, Safety & Security requirements and programs.
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