DFT Engineering Director

Qualcomm•San Diego, CA
•$216,400 - $324,600

About The Position

Qualcomm Technologies, Inc.'s Digital ASIC Design Team is seeking a candidate to implement and verify advanced Design for Test/Design for Debug (DFT/DFD) techniques for low-power, multi-voltage designs. The role contributes to deploying DFT methodologies intended to reduce test cost, increase product quality, and enhance yield learning on leading-edge process technologies. The successful candidate will bring hands-on experience with industry-standard DFT techniques, including scan and MBIST, and experience in both pre-silicon and post-silicon DFT work. Qualcomm employees are expected to actively support diversity on their teams and within the Company.

Requirements

  • Bachelor's degree in Science, Engineering, or a related field and 8+ years of ASIC design, verification, validation, integration, or related work experience; or a Master's degree in a relevant field and 7+ years of such experience; or a PhD in a relevant field and 6+ years of such experience.
  • Hands-on experience with industry-standard DFT techniques such as scan and MBIST.
  • Experience in pre-silicon and post-silicon DFT.
  • Strong fundamental knowledge of DFT.
  • Understanding of core-based test methodology and scan isolation.
  • Knowledge of fault models including Stuck-at, Transition, Path Delay, Gate-Exhaustive, IDDQ, and Cell Aware.
  • Knowledge of JTAG, Scan Compression, ATPG, Fault Simulation, and at-speed testing.
  • Experience with industry EDA ATPG and insertion tools.

Nice To Haves

  • 15+ years of industry experience implementing and verifying advanced DFT/DFD techniques for low-power and multi-voltage-domain designs.

Responsibilities

  • Implement and verify advanced DFT/DFD techniques for low-power, multi-voltage designs.
  • Help deploy DFT methodologies that reduce test cost, increase product quality, and enhance yield learning.
  • Generate DFT patterns and perform coverage analysis and debug.
  • Run and debug gate-level simulations.
  • Perform DFT implementation, scan/ATPG, and MBIST insertion and validation.

Benefits

  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for the annual bonus).
  • Competitive benefits package designed to support employees at work, at home, and at play.
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