Quest Global is seeking a highly experienced Design for Test (DFT) Engineer to contribute to the development of complex SoC/ASIC designs. The role focuses on DFT planning, integration, testing methodologies, and continuous improvement of DFT flows across chip-level and block-level implementations. This is an on-site position located in San Jose, San Diego, or Irvine, California, and requires commuting to the work location using personal transportation.
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Job Type
Full-time
Career Level
Senior