Cadence is hiring a layout engineer for its custom layout team in the Cadence IP Group. The team creates high-quality, high-speed, high-accuracy CMOS integrated-circuit IP for consumer, industrial, and automotive markets, across multiple foundries and process nodes, including advanced FinFET and gate-all-around technologies. The role involves producing analog and mixed-signal circuit-block layouts in collaboration with circuit designers and contributing to all stages of the back-end flow, from initial floor planning through detailed layout and final verification against foundry design rules. The designer will use Cadence tools and may contribute to the development and validation of Cadence Virtuoso layout and verification software.
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Job Type
Full-time