About The Position

The CPU Platform Architecture team works to improve single-threaded and multi-threaded CPU performance across Apple products. The team is seeking an innovative, motivated individual to help explore next-generation CPU designs for iPhone, iPad, Mac, and server products. As a CPU Performance Engineer focused on the memory subsystem, you will help define and optimize CPU and cache microarchitecture. You will identify performance bottlenecks, evaluate potential improvements, and collaborate with CPU and SoC designers in microarchitecture and RTL to assess ideas through modeling, refine models, and develop new ideas. The role involves analyzing single-threaded and multi-threaded workloads across existing and new product categories to find bottlenecks and improvement opportunities. You will also work with the broader CPU architecture and performance team to maintain and improve the simulation environment, support data-driven decisions, and increase team productivity.

Requirements

  • Bachelor of Science degree.
  • Experience in CPU and SoC architecture and microarchitecture.
  • Experience with performance simulation environments.
  • Object-oriented programming experience in C/C++.
  • Experience with a scripting language such as Perl or Python.

Nice To Haves

  • Knowledge of memory latency tolerance techniques or other aspects of the CPU memory subsystem, such as prefetching and caching policies.
  • 10 or more years of relevant industry experience.
  • Master's or PhD in Electrical or Computer Engineering or Computer Science.
  • Understanding of common data structures and algorithms.
  • Familiarity with SIMD, vector, or accelerator architectures.
  • Familiarity with multiprocessor performance.
  • Comfort working in an uncertain environment and navigating ambiguity.
  • Experience in a research-driven environment.

Responsibilities

  • Define and optimize CPU and cache microarchitecture, with a focus on the memory subsystem.
  • Identify performance bottlenecks and evaluate ideas to improve designs.
  • Collaborate with CPU and SoC designers in microarchitecture and RTL to assess ideas through modeling and refine model correlation.
  • Analyze single-threaded and multi-threaded workloads across existing and new product categories to identify bottlenecks and improvement opportunities.
  • Collaborate with the CPU architecture and performance team to maintain and improve the simulation environment.
  • Seek ways to increase the productivity of the broader team.
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service