ASIC Physical Design Engineer, Senior

Positron Corporation

1d • $150,000 - $250,000 • Remote

About The Position

Contribute to the physical implementation of Positron's AI accelerators from floorplanning through tapeout. Support and help drive implementation methodology while partnering with RTL, synthesis, DFT, package, and backend design services to achieve world-class PPA. This role is posted at the Senior level. We are a growth-oriented organization and are open to discussing scope with candidates whose experience aligns more closely with a more senior track. This job description serves as a focused but generalized overview; specific responsibilities will be tailored to the experience of the final hire. Success in this role looks like reliable execution on assigned blocks, strong QoR contributions, and growing ownership of implementation methodology as you develop within the team. Help build the physical implementation methodology for a new class of AI inference accelerators from the ground up. Work at the cutting edge of advanced-node design, tackling some of the hardest problems in power, timing, and signal integrity for frontier AI workloads.

Requirements

• 5–8 years of experience in physical design, spanning floorplanning through tapeout.
• Experience contributing to one or more advanced-node tapeouts.
• Strong proficiency in Innovus and/or ICC2 implementation flows.
• Solid working knowledge of physical implementation, including floorplanning, clock tree synthesis, timing, and power closure.
• Experience supporting signoff across timing, power, and related quality metrics.
• Candidates currently authorized to work in the U.S.

Nice To Haves

• Experience with AI accelerator design.
• Familiarity with large SRAM arrays.
• Experience with SerDes and LPDDR interfaces.
• Exposure to chiplet architectures and 2.5D advanced packaging.
• Eligible candidates for H-1B visa transfers.

Responsibilities

• Support floorplanning, macro placement, and power planning across Positron's AI accelerator designs.
• Drive clock tree synthesis, place and route, and routing optimization through to timing closure on assigned blocks.
• Contribute to signal integrity, IR/EM closure, ECO implementation, and metal fill to deliver signoff-quality results.
• Support tapeout signoff for physical implementation deliverables.
• Contribute to methodology for power grids, power/ground tiles, and bump planning.
• Assist in building congestion analysis and wire estimation approaches to support early floorplan decisions.
• Support partitioning and hierarchical implementation strategies for complex, multi-block designs, under guidance from senior/principal leads.
• Execute Innovus-based implementation flows for assigned blocks.
• Apply hands-on expertise across Innovus, ICC2, Tempus, PrimeTime, Voltus, RedHawk, and Calibre.
• Drive closure across timing, power, area, congestion, DRC, LVS, EM, IR, and yield for owned blocks.
• Partner closely with backend design services to align on implementation strategy and execution.
• Participate in implementation quality reviews.
• Apply AI-enabled techniques for automated QoR analysis, congestion prediction, routing prediction, and floorplan optimization.

Benefits

• Fully company-paid medical, dental, and vision insurance for you and your dependents
• Company-paid life and disability coverage, with voluntary options to add more
• Supplemental hospital, critical illness, and accident coverage available
• Unlimited paid time off
• 13 paid company holidays
• Remote-first culture with a company-provided computer and home office setup
• Competitive salary and equity
• 401(k) with company matching, eligible from day one
• Visa Support

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: No Education Listed