ASIC Intern

Hewlett Packard Enterprise • Roseville, CA

6d • Hybrid

About The Position

Aruba, a Hewlett Packard Enterprise company, is seeking an ASIC Post-Si Verification Engineering Intern to join its team in Roseville, California. The intern will work with the HPE Aruba ASIC development team on next-generation networking products, completing a summer project that contributes to development activities for current or future ASICs. The ASIC team develops networking chips for the marketplace and customers, and the intern will learn from and work alongside senior ASIC/VLSI team members. Assignment alignment will depend on the student's skills and business needs.

The role is hybrid, with an average of two days per week in an HPE office. The position is intended for university students pursuing a technical degree, typically working during school breaks and returning to university afterward. The posting notes that part-time work during the school year may be available to full-time students in some countries.

HPE describes its culture as inclusive and supportive of varied backgrounds, with flexibility to manage work and personal needs. It also offers resources for health and wellbeing and programs supporting personal and professional development.

Requirements

• Currently pursuing a bachelor's or master's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related technical field.
• Have completed at least the third year of engineering courses.
• Basic programming or scripting knowledge, such as Verilog, SystemVerilog, Python, Perl, TCL, C, or C++.
• Experience with hardware design.
• Strong interest in high technology and a passion for learning.
• Excellent communication and interpersonal skills.
• Strong problem-solving and analytical skills.
• Ability to work in a team environment.

Responsibilities

• Work with the HPE Aruba ASIC development team on next-generation products.
• Complete a summer project used in development activities for current or future ASICs.
• Work with and learn from senior members of the ASIC/VLSI team.
• Depending on assignment, contribute to RTL or physical design, pre-silicon or post-silicon verification, formal verification, script or tool development, schedule breakdowns, and document generation.

Benefits

• A comprehensive suite of benefits supporting physical, financial, and emotional wellbeing.
• Programs supporting personal and professional development and career goals.

What This Job Offers

• Job Type: Full-time
• Career Level: Intern