The ASIC DFT Technical Leader will work in Cisco’s Silicon One development organization, collaborating with front-end RTL and backend physical design teams to understand chip architecture and establish DFT requirements early in the design cycle. The role contributes to the development of next-generation networking chips and helps lead DFT and quality processes throughout the implementation flow and post-silicon validation phases. It also provides exposure to physical design signoff activities.
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Job Type
Full-time
Career Level
Senior