ASIC DFT DV Technical Leader (Hybrid)

Cisco•San Jose, CA

22h•Hybrid

About The Position

The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. Your Impact Responsible for thorough test planning and development of test benches to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening, in-system test, debug and diagnostics needs of the design Collaborate with the design/design-verification and PD teams to enable the integration and validation of the test logic in all phases of the implementation and post silicon validation flows. Work with the team on Innovative Hardware DFT & test strategy aspects for new silicon device models, bare die & stacked die, driving re-usable test and debug methodologies and standards. You will be in the Silicon One development organization as a DFT Verification Lead in San Jose, CA. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT verification. The job requires the candidate to have the ability to craft solutions and debug with minimal mentorship.

Requirements

Bachelors + 8 years of related experience, or Masters + 6 years of related experience, or PhD + 3 years of related experience
Prior experience in test planning based on complex design specification.
Prior experience in testbench development using System Verilog.
Experience debugging using DVE/Verdi.
Experience with TCL, Python or Perl.

Nice To Haves

UVM and advanced System Verilog knowledge.
Knowledge about JTAG protocol, scan architecture, MBIST and boundary scan.

Responsibilities

Responsible for thorough test planning and development of test benches to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening, in-system test, debug and diagnostics needs of the design
Collaborate with the design/design-verification and PD teams to enable the integration and validation of the test logic in all phases of the implementation and post silicon validation flows.
Work with the team on Innovative Hardware DFT & test strategy aspects for new silicon device models, bare die & stacked die, driving re-usable test and debug methodologies and standards.
Work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT verification.
Craft solutions and debug with minimal mentorship.

Benefits

medical, dental and vision insurance
a 401(k) plan with a Cisco matching contribution
paid parental leave
short and long-term disability coverage
basic life insurance
10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
Non-exempt employees receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
Additional paid time away may be requested to deal with critical or emergency issues for family members
Optional 10 paid days per full calendar year to volunteer
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan.
Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.