ASIC Design Verification Engineer (Security Group) - Sr Staff

Qualcomm • Santa Clara, CA

17d • $190,200 - $285,400

About The Position

Qualcomm Technologies is hiring a Senior Staff ASIC Design Verification Engineer for its Security Group. The engineer will collaborate with chip, subsystem, and SOC architects to validate core and subsystem micro-architectures and help ensure the design is ready for launch in the end product. The role involves developing verification plans, methodologies, environments, testbenches, and coverage strategies, then executing verification through design and environment bring-up, regressions, and debugging. The engineer will track verification progress using metrics such as bugs and coverage, analyze coverage reports, and refine plans to address coverage gaps.

The position focuses on critical, high-performance and secure designs. It requires independent work with minimal supervision, significant decision-making, and guidance of other team members. The engineer will collaborate across functions on requirements, specifications, and trade-offs; document complex secure subsystem designs; review junior engineers’ documentation; and lead technical discussions on test plans and debug issues. Qualcomm describes its hardware engineering work as encompassing planning, design, optimization, verification, and testing of electronic systems and related technologies, with collaboration across teams to meet performance requirements.

Requirements

• 10+ years of SOC-level verification experience is specified in the qualifications.
• Bachelor’s degree in Science, Engineering, or a related field and 6+ years of ASIC design, verification, validation, integration, or related work experience; or a master’s degree and 5+ years; or a PhD and 4+ years.
• Good understanding of debugging ARM-based or RISC-V-based processors.
• Good understanding of APB, AHB, and AXI protocols.
• Solid understanding of SystemVerilog and UVM concepts.
• SystemVerilog.
• UVM.
• Synopsys VCS/Verdi.
• Makefile automation.
• Python scripting.
• Assertion-based verification.
• Functional coverage.
• Basic understanding of UNIX commands and Python or Perl scripting.
• Ability to communicate complex information verbally and in writing; may require negotiation, influence, and tact.
• Ability to plan, solve problems, and prioritize tasks without predefined steps.

Nice To Haves

• Prior experience with a cryptographic algorithm.
• Deep knowledge of APB, AXI, and SPI protocols, handshake mechanisms, cross-clock domains, and clock gating.
• Understanding of memory organization, fault-tolerant design, parity schemes, error detection, and error correction.
• Experience with formal techniques, assertions, and silicon bring-up.
• In-depth knowledge of microprocessor functions, Network-on-Chip architectures, and micro-architectures.
• Experience writing test plans, portable testbenches, transactors, and assembly code.
• Experience with verification methodologies and tools, including simulators, coverage collection, gate-level simulation, waveform viewers, and mixed-signal verification.
• Ability to independently develop and work on a block or unit of the design.

Responsibilities

• Work with subsystem and SOC architects to understand concepts and high-level system requirements.
• Develop detailed test and coverage plans based on architecture and micro-architecture.
• Develop scalable and portable verification methodologies.
• Develop verification environments, including stimulus, checkers, monitors, assertions, and coverpoints.
• Develop verification plans and testbenches for the assigned functional domain.
• Execute verification plans, including design and DV environment bring-up, regressions, feature enablement, and debugging test failures.
• Track and report DV progress using metrics such as bugs and coverage.
• Use knowledge of computer architecture, micro-architecture, logic design, circuits, and/or physical design to develop and verify critical high-performance and secure designs.
• Anticipate, identify, and solve complex problems affecting design completeness, functionality, power, and performance.
• Collaborate with cross-functional teams to define requirements, specifications, and trade-offs in support of product goals.
• Evaluate design processes from conceptualization through productization, including architecture definition, feasibility, pre-silicon design and verification, and post-silicon validation.
• Write technical documentation for complex secure subsystem designs and review documentation produced by junior engineers.
• Propose technical meetings and discussions to review test plans, debug issues, and incorporate feedback into documentation and plans.
• Run and analyze coverage reports, identify coverage holes, and revise test plans to meet coverage metrics.
• Work independently with minimal supervision and provide supervision or guidance to other team members.

Benefits

• Competitive annual discretionary bonus program.
• Opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for the annual bonus).
• Competitive benefits package designed to support employees at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior