About The Position

Join Apple’s high-speed SerDes team to develop next-generation, high-performance wireline transceivers and intellectual property for Apple systems-on-chip. The role focuses on designing high-performance analog mixed-signal circuits for SerDes PHYs, evaluating circuit topologies for product requirements, and optimizing power, performance, and area. Example circuits include receivers, clock and data recovery circuits, transmitters, bias generators, high-speed clock-generation and low-jitter distribution circuits, phase interpolators, delay-locked loops, and voltage-controlled oscillators. The engineer works with cross-functional design teams to define block-level specifications and carry designs through transistor-level implementation, behavioral modeling, mask design, and delivery of IP views to SoC teams. The work also includes ensuring quality standards, evaluating designs, and communicating progress and technical insights with peers and management.

Requirements

  • Bachelor’s or master’s degree in Electrical Engineering.
  • Deep understanding of analog mixed-signal design and experience with high-speed serial links.
  • Experience designing analog mixed-signal circuit blocks, including bandgaps, biasing circuits, LDO regulators, amplifiers, comparators, switched-capacitor circuits, ADCs, DACs, oscillators, and filters.
  • Understanding of mismatch mitigation, linearity, stability, and low-power and low-noise techniques.
  • Understanding of digitally assisted analog design, including background calibration and LMS-based adaptive loops.
  • Experience with high-speed digital circuits such as serializers, deserializers, counters, and dividers, and understanding of digital design concepts.
  • Knowledge of transmitter and receiver equalization techniques and circuits, including CTLE, DFE, and de-emphasis, for 20+ Gbps NRZ and PAM applications.
  • Knowledge of CDR architectures and implementations.
  • Knowledge of laboratory equipment and testing.
  • Experience in AMS circuit modeling and performance evaluation using tools such as SystemVerilog, Matlab, Python, or VerilogAMS.
  • Hands-on experience with advanced CMOS technologies and FinFET design.
  • Hands-on experience with AMS IC development from definition through high-volume production, including layout supervision, bench evaluation, correlation, and characterization.

Nice To Haves

  • Knowledge of timing closure concepts and related industry tools such as Nanotime and Primetime.
  • Experience testing high-speed serial I/O in a lab, including debugging and data analysis.
  • Knowledge of common high-speed SerDes protocols such as PCIe, USB, DP, and MPHY.
  • Scripting and automation skills to improve efficiency.

Responsibilities

  • Develop high-performance, high-speed analog mixed-signal circuits for SerDes PHYs.
  • Evaluate circuit topologies against product requirements and power, performance, and area goals.
  • Collaborate with architecture, SIPI, packaging, board design, DFT, and ESD teams to create block-level specifications.
  • Execute transistor-level circuit implementation and behavioral modeling.
  • Drive mask design to implement design layout views.
  • Work with SoC teams to deliver IP views and ensure they meet quality standards.
  • Communicate progress and discuss technical insights with peers and management.
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