Internship - Analog Mixed-Signal Design Verification Engineer
About The Position
This internship offers a chance to take the first step in your career and shape the future by working on real projects with real impact and opportunities to grow. As an intern, you will be part of creating tiny chips and big careers. Infineon Technologies is a global leader in semiconductor solutions for power systems and IoT, enabling solutions for green and efficient energy, clean and safe mobility, and smart and secure IoT. The company drives innovation and customer success while caring for its people and empowering them to reach ambitious goals. Infineon is committed to creating the best Infineon for everyone by embracing diversity and inclusion, offering a workplace built on trust, openness, respect, and equal opportunity. Hiring decisions are based on skills and experience, and applicants are encouraged to apply even if they don't meet every requirement. Accommodations can be requested during the interview process.
Requirements
- Junior level or higher, actively pursuing a Bachelor’s or Master’s degree in Electrical Engineering or a related engineering field.
- Coursework in analog circuits, electronics, signal analysis, or mixed-signal fundamentals strongly preferred.
- Demonstrated coding or scripting experience in Python, MATLAB, Tcl, or similar tools preferred.
- Experience with Verilog-AMS and SystemVerilog and familiarity with mixed-signal modeling approaches.
- Exposure to Cadence Virtuoso, Spectre, ADE Explorer/Assembler, vManager, and Xcelium preferred.
- Strong analytical, organizational, and communication skills with ability to collaborate across design and verification teams.
- US citizen or green card holder: This position requires access to documentation that is controlled by the export laws of the United States. Candidates are required to provide proof of either US citizenship, Permanent US residency, or classification as a protected individual as defined in 8USC 1324b(a)(3).
Responsibilities
- Develop verification plans per device specifications and requirements to ensure coverage of analog and mixed-signal design intent.
- Generate and maintain Verilog-AMS, SystemVerilog, and mixed-signal behavioral models to support simulation and verification workflows.
- Develop testbenches, simulation environments, and regression flows for mixed-signal verification.
- Create and execute mixed-signal simulation flows to validate device-level and system-level behavior across operating conditions.
- Evaluate behavior under nominal and corner conditions to ensure design robustness and performance compliance.
Benefits
- Incentive plan
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What This Job Offers
Career Level
Intern
