Validation/Characterization Engineer

Texas Instruments•Dallas, TX

About The Position

This role is part of the HVDC datacenter product line, which develops chips for next-generation AI datacenter power supplies, including 400V GaN power stages and low-voltage synchronous rectifiers. The engineer will lead validation efforts across both product types and play a critical role in bringing the solutions to market. The position is responsible for confirming that products meet datasheet and validation/verification compliance matrix (VVCM) specifications, and for characterizing and validating device functionality in real-world system-level use cases. The engineer designs validation PCBs and develops automated test software to improve test coverage and reduce data-collection time. The role works closely with design, systems, applications, and test engineering teams to investigate failures and drive product improvements. The engineer will define and execute a traceable validation plan, build validation hardware and automated test sequences, analyze results across devices and conditions, and confirm functional tests pass before validation sign-off. The work also includes statistical analysis and datasheet plot generation, structured experiments to investigate unexpected behavior, cross-functional reviews, and thorough documentation of plans, procedures, results, and debugging findings.

Requirements

Master's degree in Electrical Engineering or a related field.
At least 3 years of relevant semiconductor industry experience in characterization or validation.
Proficiency with laboratory instrumentation, including oscilloscopes, SMUs, DMMs, signal generators, power supplies, and NI PXI systems.
Experience developing test automation using Python, NI TestStand, and LabVIEW.

Nice To Haves

Experience testing high-voltage GaN power stages and low-voltage synchronous rectifiers, including COSS, double-pulse testing, SOA, and IDSAT measurements.
Ability to thrive in a fast-paced, results-driven development environment.
Expertise diagnosing and resolving complex hardware, software, and device-level issues using systematic debugging and root-cause analysis.
Strong hands-on laboratory skills, including soldering, board bring-up, and validation equipment setup.
Ability to build strong relationships with internal and external stakeholders.
Strong verbal and written communication skills.
Self-driven approach and strong ownership, with the ability to plan and execute validation from test-plan definition through sign-off with minimal direction.
PCB design experience using Cadence Allegro X.
Understanding of power electronics layout fundamentals, particularly for GaN FETs.
Experience working with high-voltage power circuits in a laboratory environment.
Proficiency with Python, NI TestStand, and LabVIEW for automated data collection and test sequence development.
Familiarity with validation compliance tracking tools.
Experience with Git or an equivalent version control system.
Experience with Spotfire or an equivalent data visualization and analysis tool.
Experience generating datasheet-quality characterization plots from data.
Working knowledge of statistical methods for limit validation, including distribution analysis, Cpk, and specification capability.

Responsibilities

Understand device-level and system-level validation requirements with product definition and design teams before devices are available.
Define, own, and drive a comprehensive validation test plan and schedule covering VVCM and datasheet specifications and required functional tests, with full traceability and on-time results.
Design and build validation PCBs using Cadence Allegro X to meet GaN high-voltage signal and power integrity requirements and synchronous rectifier high-current requirements, integrating with existing validation hardware infrastructure.
Build reusable automated test sequences using NI TestStand and LabVIEW to execute the validation plan and collect characterization data across devices and test conditions.
Analyze characterization data against VVCM specifications, assess device compliance, establish pass/fail criteria for functional tests, and confirm all tests pass before validation sign-off.
Lead cross-functional reviews of validation hardware, test results, and debug findings with design, systems, applications, and test engineering stakeholders.
Generate datasheet plots and apply statistical analysis, including distributions, Cpk, and limit capability, to assess specification margins and inform datasheet limit decisions.
Investigate unexpected validation behavior using structured design of experiments to identify root causes in stimulus, hardware, or device circuitry, and drive resolution with the design team.
Maintain clear documentation of validation test plans, procedures, and debug findings.
Prepare concise validation summaries containing test results for cross-functional reviews and program records.