Validation/Characterization Engineer

Texas Instruments•Dallas, TX

About The Position

This role is part of Texas Instruments’ HVDC datacenter product line, which develops 400V GaN power stages and low-voltage synchronous rectifiers for next-generation AI datacenter power supplies. The engineer leads validation efforts across both product types and contributes to bringing new power solutions to market. The role ensures products meet datasheet and validation/verification compliance matrix (VVCM) specifications, and that device functionality is characterized across real-world system-level use cases. The engineer designs validation PCBs and develops automated software to improve test coverage and reduce data collection time, while working with design, systems, applications, and test engineering teams to investigate failures and drive product improvements. The engineer owns validation planning and execution from requirements definition through sign-off, including test-plan development, hardware and automation development, data analysis, statistical assessment, cross-functional reviews, debugging, documentation, and validation summaries.

Requirements

Master's degree in Electrical Engineering or a related field of study.
At least 3 years of relevant semiconductor industry experience in characterization or validation.
Proficiency with laboratory instrumentation, including oscilloscopes, SMUs, DMMs, signal generators, power supplies, and NI PXI systems.
Experience developing test automation using Python, NI TestStand, and LabVIEW.

Nice To Haves

Experience testing high-voltage GaN power stages and low-voltage synchronous rectifiers, including COSS, double-pulse testing, SOA, and IDSAT measurements.
Ability to thrive in a fast-paced, results-driven development environment.
Expertise diagnosing and resolving complex hardware, software, and device-level issues using systematic debugging and root-cause analysis.
Strong hands-on laboratory skills, including soldering, board bring-up, and equipment setup for validation testing.
Ability to establish strong relationships with internal and external stakeholders.
Strong verbal and written communication skills.
Self-driven ownership and ability to independently plan and execute validation from test-plan definition through sign-off with minimal direction.
Hands-on PCB design experience using Cadence Allegro X.
Understanding of power electronics layout fundamentals, specifically for GaN FETs.
Experience working with high-voltage power circuits in a laboratory environment.
Proficiency with Python, NI TestStand, and LabVIEW for automated data collection and test-sequence development.
Familiarity with validation compliance tracking tools.
Experience with Git or an equivalent version control system.
Experience with Spotfire or an equivalent data visualization and analysis tool.
Experience generating datasheet-quality characterization plots from data.
Working knowledge of statistical methods for limit validation, including distribution analysis, Cpk, and specification capability.

Responsibilities

Work with product definition and design teams before device availability to understand device-level and system-level validation requirements.
Define, own, and drive a comprehensive validation test plan and schedule covering VVCM and datasheet specifications and required functional tests, with traceability and on-time results.
Design and build validation PCBs using Cadence Allegro X, addressing high-voltage signal and power integrity for GaN power stages and high-current requirements for low-voltage synchronous rectifiers, while integrating with existing validation hardware.
Develop reusable automated test sequences using NI TestStand and LabVIEW to execute validation plans and collect characterization data across devices and conditions.
Analyze characterization data against VVCM specifications, assess compliance, define pass/fail criteria for functional tests, and confirm tests have passed before validation sign-off.
Drive cross-functional reviews of validation hardware, test results, and debug findings with design, systems, applications, and test engineering stakeholders.
Generate datasheet plots and apply statistical analysis, including distributions, Cpk, and limit capability, to assess specification margins and inform datasheet limits.
Investigate unexpected behavior through structured design of experiments to identify root causes and drive resolution with the design team.
Maintain thorough documentation of validation test plans, procedures, and debugging findings.
Author validation summaries containing test results for cross-functional reviews and program records.