Staff Engineer, VSDRAM Process Integration
About The Position
Samsung Semiconductor Inc. is seeking an experienced process integration engineer to develop next-generation DRAM technology and support the growth of Samsung’s memory business, technology leadership, and market opportunities. The position is based at the San Jose office/headquarters and requires daily onsite presence in alignment with the company’s Flexible Work policy. The engineer will plan, design, and implement process integration for quality wafer fabrication processes for future DRAM. Work includes defining technology requirements, design rules, and structural and electrical specifications; developing process modules and integrating complete processes; and integrating novel DRAM device components, including memory array transistors, capacitors, CMOS transistors, and memory array interfaces. The role also identifies module requirements and technology gaps, coordinates cross-functional teams, analyzes and interprets inline inspection and measurement data to improve performance and reliability, and engages with internal and external customers. Other responsibilities may be assigned.
Requirements
- Bachelor’s degree and 10+ years of industry experience; alternatively, a master’s degree and 8+ years, or a Ph.D. and 5+ years of industry experience are specified as preferred qualification pathways.
- At least 2 years of research and development experience in DRAM, NAND, and/or emerging memory.
- Knowledge, achievements, and skillsets in unit process engineering.
- Strong knowledge of Design of Experiments principles and analytical skills.
- Experience with process integration and core/periphery architecture co-optimization.
- Proficiency with statistical data analysis software.
- Ability to adapt communication and working style to different situations and diverse global norms.
- Curiosity, resilience, and a data-informed approach to challenges.
- Collaborative approach, including building relationships, offering support, and welcoming different approaches.
- Innovative and creative mindset, with proactive exploration of new ideas and adaptability to change.
Responsibilities
- Plan, design, and implement process integration for quality wafer fabrication processes for future DRAM.
- Define technology requirements, design rules, and structural and electrical specifications.
- Execute technology integration activities for DRAM device components, including memory array transistors, capacitors, CMOS transistors, and memory array interfaces.
- Identify key module requirements and technology gaps, and drive cross-functional teams.
- Collaborate with simulation, process development, process architecture, circuit design, and quality assurance teams to meet target product requirements.
- Develop process modules and perform full process integration.
- Conduct technical interactions with internal and external customers.
- Analyze, extract, interpret, and provide feedback on inline inspection and measurement data to improve performance and reliability.
- Complete other responsibilities as assigned.
Benefits
- Medical, dental, and vision benefits.
- 401(k).
- Incentive opportunities based on individual and company performance.
- Charitable giving match and opportunities to participate in community activities.
- 4+ weeks of paid time off per year, plus holidays and sick leave.
- Fertility care or adoption stipend, caregiver support, and medical travel support.
- On-demand wellness apps and free confidential therapy sessions.
- Onsite café and gym, plus virtual fitness classes.
- Flexible work environment.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
