Staff Device Development Engineer

Samsung•Austin, TX
•Onsite

About The Position

Samsung Austin Semiconductor is seeking a technically accomplished engineer to lead initiatives within the New Technology Bridge Device Integration team. The role focuses on optimizing transistor performance and defining targeting strategies for the 14nm derivative generation, with the aim of achieving industry-leading yield, reliability, and manufacturability. The engineer will work across device physics and process modules, including Fin/PC, SD, RMG/MOL, and BEOL, collaborating with Module Integration and Process Architecture teams to establish transistor performance and targeting conditions for next-generation technologies. This position owns transistor-focused electrical test trends, parametric yield, wafer acceptance electrical test (WAT), and model-to-hardware correlation (MHC) management for one or more customer accounts or products. It also involves designing experiments, analyzing process interactions and electrical data, resolving systematic issues, and supporting process teams in evaluating the device impact of key changes.

Requirements

  • Bachelor of Science or Engineering in Electrical, Computer, Material Science, or a related area.
  • At least 7 years of semiconductor industry experience.
  • Demonstrated experience with technology, process, and qualification development milestones to meet customer and industry specifications.
  • Understanding of interactions between process and electrical test.
  • Knowledge of process flow.
  • Familiarity with unit processes including thin-film deposition, etch, diffusion, wet process, CMP, and photolithography.
  • Analysis skills in electrical device characterization, yield analysis, data mining, DOE, and SPC using JMP or Spotfire.
  • SPICE modeling or simulation, MHC, and PDK update experience.

Nice To Haves

  • Master's or PhD degree.
  • 10 or more years of semiconductor industry experience.

Responsibilities

  • Ensure transistor-focused electrical test (ET) trends are targeted to customer and product specifications, and promptly investigate shifts or abnormalities.
  • Analyze process interactions, including inline metrology and FDC, in relation to ET, and understand the effects of ET data on parametric yield.
  • Own parametric yield, wafer acceptance electrical test (WAT), and model-to-hardware correlation (MHC) management for one or more customer accounts or products.
  • Design, execute, and analyze experiments to optimize transistor performance and variation, meet design requirements, improve parametric yield, and ensure product reliability and manufacturability.
  • Lead task force teams to resolve systematic yield, performance, or reliability issues.
  • Support unit process or process integration teams by evaluating device impacts of key change points.

Benefits

  • Medical insurance
  • Dental insurance
  • Vision insurance
  • Life insurance
  • 401(k) matching with immediate vesting
  • Onsite cafés
  • Onsite workout facilities
  • Paid maternity leave
  • Paid paternity leave
  • Paid time off
  • Two personal holidays
  • Ten regular holidays
  • Wellness incentives
  • Eligible full-time employees may receive MBO bonuses based on company, division, and individual performance.
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