Staff Device Development Engineer

Samsung Electronics • Austin, TX

1d • Onsite

About The Position

Samsung Austin Semiconductor is seeking a technically accomplished engineer to lead initiatives within the New Technology Bridge Device Integration team. The role focuses on optimizing transistor performance and defining targeting strategies that support industry-leading yield, reliability, and manufacturability for the 14nm derivative generation. The engineer will apply device-physics understanding across Fin/PC, SD, RMG/MOL, and BEOL modules, collaborating with Module Integration and Process Architecture teams to develop transistor performance and targeting conditions for next-generation technologies.

This is a full-time, on-site position. Base compensation depends on education, experience, skills, and location. Eligible full-time employees may also receive MBO bonuses based on company, division, and individual performance.

Requirements

• Bachelor of Science or Engineering degree in Electrical Engineering, Computer Engineering, Material Science, or a related area.
• At least 7 years of semiconductor industry experience.
• Demonstrated experience with technology, process, and qualification development milestones to meet customer and industry specifications.
• Understanding of interactions between process and Electrical Test, and knowledge of process flow.
• Familiarity with unit processes, including thin-film deposition, etch, diffusion, wet process, CMP, and photolithography.
• Analysis skills in electrical device characterization, yield analysis, data mining, DOE, and SPC using JMP or Spotfire.
• Experience with SPICE modeling or simulation, MHC, and PDK updates.

Nice To Haves

• Master's or PhD degree.
• 10 or more years of semiconductor industry experience.

Responsibilities

• Ensure transistor-focused Electrical Test (ET) trends target customer and product specifications, and conduct timely root-cause studies for shifts or abnormalities.
• Analyze process interactions, including inline metrology and FDC, in relation to ET, while understanding the effect of ET data on parametric yield.
• Manage parametric yield, wafer acceptance electrical test (WAT), and model-to-hardware correlation (MHC) for one or more customer accounts or products.
• Design, execute, and analyze experiments to optimize transistor performance and variation, meet design requirements, improve parametric yield, and ensure a reliable and manufacturable product.
• Lead task force teams addressing systematic yield, performance, or reliability issues.
• Support unit process or process integration teams by evaluating device impacts of key change points.

Benefits

• Medical, dental, and vision insurance
• Life insurance
• 401(k) matching with immediate vesting
• Onsite cafés
• Workout facilities
• Paid maternity and paternity leave
• Paid time off, plus 2 personal holidays and 10 regular holidays
• Wellness incentives
• Eligible full-time employees may receive MBO bonuses based on company, division, and individual performance.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior