Staff Advanced Packaging Engineer

Qualcomm•San Diego, CA
•$160,200 - $240,200

About The Position

Qualcomm Technologies, Inc. is seeking a highly motivated Staff Engineer, Advanced Packaging & Package Integration to lead package technology development, architecture, new product introduction (NPI), and manufacturing execution for next-generation AI and data center products. The role focuses on advanced heterogeneous integration and close collaboration with foundries, OSATs, substrate suppliers, and internal design and manufacturing teams. The position leads advanced package development and integration, package NPI and manufacturing activities, and collaboration with foundries and suppliers. It also involves technical risk assessment, root-cause analysis, qualification, yield improvement, and manufacturing readiness. The role requires good analytical and project management skills, innovation and creativity, motivation, commitment to individual and team success, and strong interpersonal communication skills. Technical reports are to be published. Flexible hours and occasional domestic or international travel are required.

Requirements

  • Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or a related field and 4 or more years of System/Package Design/Technology Engineering or related work experience; or a master's degree in one of these fields and 3 or more years of related experience; or a Ph.D. in one of these fields and 2 or more years of related experience.
  • Good analytical and project management skills.
  • Excellent capability for innovation and creativity.
  • Highly motivated and committed to individual and team success.
  • Superior interpersonal communication skills.
  • Able to work flexible hours.
  • Occasional domestic and international travel is needed.

Nice To Haves

  • M.S. or Ph.D. in Materials Science, Mechanical Engineering, Chemical Engineering, or equivalent.
  • 8–10 years of hands-on experience in silicon interconnect process, bumping and/or RDL process, new technology qualification, and production.

Responsibilities

  • Lead package development for 2.5D/3D integration, CoWoS, SoIC, HBM, Silicon Bridge, hybrid bonding, FCBGA, and high-density substrates.
  • Optimize package architecture, including die floorplanning, bump and microbump strategy, power and signal integrity, and thermal and mechanical design.
  • Develop package test vehicles to support technology qualification and early risk reduction.
  • Lead package NPI from concept through engineering builds, qualification, production ramp, and manufacturing release.
  • Drive bumping, flip-chip assembly, underfill, thermal solutions, substrate assembly, and board-level integration.
  • Lead technical risk assessment, root-cause analysis, qualification, yield improvement, and manufacturing readiness.
  • Partner with foundries, bumping houses, substrate suppliers, and OSATs on design rules, PDK readiness, process capability, reliability, yield, cycle time, capacity, and production ramp.
  • Support new process and production-line qualification and multi-source readiness.
  • Publish technical reports.

Benefits

  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants; employees on sales-incentive plans are not eligible for the annual bonus.
  • Competitive benefits package designed to support employees at work, at home, and at play.
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