About The Position

Apple’s Advanced Packaging team is seeking an experienced Packaging Development Engineer to drive next-generation packaging integration and technology development for future products. The engineer will lead the definition, development, and qualification of advanced 2.5D and 3D packaging technologies, including hybrid bonding, high-density interposers, fine-pitch microbumps, and Through-Silicon Vias (TSVs). The role works cross-functionally with silicon design, physical design, SI/PI, thermal, and manufacturing teams to guide technologies from early architecture exploration through qualification and high-volume manufacturing. The position is responsible for advanced package integration and technology development within a cross-functional team, driving novel 2.5D/3D architectures from early concept through qualification.

Requirements

  • Bachelor of Science degree and 10 or more years of relevant industry experience.

Nice To Haves

  • PhD and 6 or more years of experience in relevant industry.
  • Strong technical background in 2.5D/3D packaging and semiconductor integration schemes such as hybrid bonding, interposers, fine-pitch microbumps, and TSVs.
  • Solid grasp of fab BEoL/MEoL interconnect processing, wafer-level packaging, and advanced assembly flows.
  • Understanding of packaging materials, thermo-mechanical reliability, and chip-package interaction failure mechanisms.
  • Broad systems mindset and ability to balance package-level choices against silicon, electrical, thermal, and manufacturing constraints.
  • Experience utilizing layout, physical design, or modeling tools alongside engineering data analysis.
  • Proven track record collaborating with and driving external foundries, OSATs, or material vendors.
  • Excellent communication and collaboration skills across cross-functional hardware teams.

Responsibilities

  • Lead the definition, development, and qualification of cutting-edge 2.5D and 3D packaging technologies.
  • Drive novel 2.5D/3D architectures from early concept and architecture exploration through qualification and high-volume manufacturing.
  • Collaborate with silicon design, physical design, SI/PI, thermal, and manufacturing teams.
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