STA Engineer

Apple•Cupertino, CA

About The Position

Apple is seeking an ASIC STA Engineer to support leading-edge IP development and coordinate with multiple SoC teams. The role works collaboratively with various SoC teams to execute design and integration tasks and deliver high-quality IP. The engineer will work on Apple SoC chips in deep sub-micron technologies for high-end mobile applications, partnering with multifunctional teams to resolve complex timing issues across major building blocks of complex SoCs.

Requirements

  • Bachelor’s degree and 3 years of experience.
  • Strong fundamentals in digital design.
  • Self-starter and highly motivated.
  • Proficient in scripting languages, including TCL and Perl.
  • Familiarity with ASIC design timing concepts.
  • Ability to communicate effectively across internal groups.

Nice To Haves

  • Exposure to STA tools such as PrimeTime.
  • Familiarity with front-end tools and methodologies such as synthesis and logic equivalence checks.
  • Familiarity with constraint analysis and debugging using industry-standard tools such as Synopsys GCA (Galaxy Constraint Analyzer); desirable but not required.
  • Knowledge of timing corners and modes, process variations, and signal-integrity-related issues.

Responsibilities

  • Own full-chip and block-level timing closure throughout the entire project.
  • Develop and maintain methodologies and flows for timing verification and closure.
  • Generate block-level and full-chip timing constraints.
  • Work with multifunctional teams to resolve complex timing issues for major SoC building blocks.
  • Coordinate with SoC teams on design and integration tasks for high-quality IP deliverables.
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