ASIC DFT STA Engineer

Cisco•San Jose, CA

About The Position

The ASIC DFT STA Engineer will work in Cisco’s Silicon One development organization on next-generation networking chips. The role focuses on static timing analysis, timing constraints, and driving design-for-test (DFT) and quality processes through implementation and post-silicon validation, with additional exposure to physical design signoff. The engineer will collaborate with cross-functional teams and communicate complex timing data clearly. Candidates should bring strong analytical skills and a detailed understanding of timing constraints, including clock groups, exceptions, and clock exclusivity.

Requirements

  • Bachelor’s degree and 7 years of related experience, or a master’s degree and 4 years of related experience, or a Ph.D. and 1 year of related experience.
  • Prior working experience with RTL design, CDC/RDC and Conformal verification, and SDC development.
  • Prior working experience in timing constraint development and verification.
  • Prior programming experience with at least two of the following: Perl, TCL, Python, or Makefile.

Nice To Haves

  • Master’s degree and 10 years of relevant experience.
  • Experience debugging and analyzing PCIe timing constraints and TSMC memory timing constraints.
  • Experience debugging and analyzing timing constraints and achieving timing closure for DFT modes such as scan shift/capture and BIST.
  • Experience with SDC debugging and STA tools such as Synopsys TCM/PrimeTime.
  • Experience with synthesis tools such as Synopsys Fusion or Design Compiler.
  • Experience with Tessent tools, such as DFT insertion in RTL.

Responsibilities

  • Drive DFT and quality processes throughout the implementation flow and post-silicon validation phases.
  • Work with timing constraints, including clock groups, timing exceptions, and clock exclusivity.
  • Collaborate with cross-functional teams and communicate complex timing data clearly.
  • Contribute to development of next-generation networking chips.
  • Gain exposure to physical design signoff activities.

Benefits

  • Medical insurance
  • Dental insurance
  • Vision insurance
  • 401(k) plan with Cisco matching contribution
  • Paid parental leave
  • Short- and long-term disability coverage
  • Basic life insurance
  • Paid holidays
  • Floating holiday for non-exempt employees
  • Paid birthday day off
  • Paid year-end holiday shutdown
  • Personal wellness days
  • Vacation time or flexible vacation time off, depending on employee classification
  • Sick time off
  • Additional paid time away may be requested for critical or emergency family issues
  • Optional paid volunteer days
  • Annual bonuses for eligible non-sales roles
  • Potential grants of Cisco restricted stock units
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