Sr Memory PHY Enablement
About The Position
The Senior Memory PHY Enablement engineer focuses on post-silicon validation and first-silicon bring-up under demanding product schedules. The role develops and executes test plans, analyzes validation results, debugs issues, and enables and characterizes memory features across process, voltage, and temperature (PVT) conditions to validate stability and robustness for production. It provides systems engineering and post-silicon support for HBM, DDR, and LPDDR memory interface IP, from lab bring-up through initial production, while also engaging in pre-silicon validation through test-plan development and emulation.
Requirements
- Strong knowledge of and interest in modern, complex processor architecture, digital design, and validation.
- Ability to collaborate with engineers across disciplines, locations, and time zones and communicate technical information clearly.
- Strong analytical and problem-solving skills, ability to learn new technologies and tools, and a structured approach to investigating complex engineering problems.
- Bachelor’s or master’s degree in computer engineering, electrical engineering, a related technical discipline, or equivalent applicable technical experience.
Nice To Haves
- Memory PHY validation experience, including familiarity with firmware and memory IP.
- Programming or scripting experience; Python is preferred.
- Firmware debugging experience and familiarity with Linux environments.
- Experience learning and applying new engineering toolsets, frameworks, and validation methodologies.
- Laboratory experience and hands-on use of equipment such as oscilloscopes, signal generators, BERT, and logic analyzers.
Responsibilities
- Provide systems engineering and post-silicon support for HBM/DDR/LPDDR memory interface IP.
- Support new-product bring-up from first silicon in the lab through initial production.
- Triage silicon-validation observations and collaborate with ATE, Platform, Firmware, and Characterization teams to identify root causes and resolve issues.
- Provide post-silicon expertise and support in silicon design, process, and integration flows for memory interface IP.
- Develop comprehensive pre-silicon test plans and run them in emulation environments to ensure robustness.
- Characterize memory PHY across PVT conditions to validate functionality and identify opportunities to improve power and performance.
Benefits
- AMD benefits are referenced as available in “AMD benefits at a glance”; specific benefits are not listed in the posting.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
