SoC Design Verification Engineer

Intel Corporation•Santa Clara, CA

1d•$105,650 - $149,150•Onsite

About The Position

The SoC Design Verification Engineer helps ensure the accuracy and functionality of Intel's next-generation Xeon server SoCs. The role focuses on functional logic verification, developing scalable verification plans, and executing emulation models to uncover and address design challenges. The work contributes to the quality, reliability, and performance of Intel server products. The position is part of Intel's Data Center Group, which develops server technologies for data centers, business transformation, cloud computing, and AI workloads. The role includes collaboration with architects, RTL developers, and post-silicon teams, as well as contributing to improvements in verification processes and pre-silicon validation strategies.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 0–1 years of hands-on silicon design and/or validation experience gained through internships, academic projects, coursework, or hands-on training; or a master's degree in one of these fields with no prior professional experience required.
Demonstrated coursework or technical experience in silicon design and/or validation/verification.

Nice To Haves

Experience developing and verifying complex IPs and/or SoCs using UVM/SystemVerilog.
Knowledge of OVM/UVM, constrained-random verification methodologies, and the complete verification lifecycle, including test plan development, execution, debug, and coverage closure.
Proficiency in scripting languages for automation and process improvement.
Familiarity with cache coherency principles and layered protocols in multiprocessor SoCs.
Experience with Xeon CPU pre-silicon, emulation validation, or post-silicon validation.
Strong analytical, debugging, and problem-solving skills, with a proactive approach to task ownership and collaboration.

Responsibilities

Perform functional logic verification of integrated SoC designs to ensure adherence to specifications.
Define and develop scalable, reusable block, subsystem, and SoC verification plans, test benches, and environments.
Execute verification plans using emulation and system simulation models to evaluate design power, performance, and functionality.
Debug and analyze issues in the pre-silicon environment and implement corrective measures.
Collaborate with architects, RTL developers, and post-silicon teams to improve verification processes for complex architectural features.
Document technical test plans and participate in reviews with design and architecture teams.
Incorporate security test coverage into the verification environment to ensure compliance with security requirements.
Maintain and optimize functional verification methodologies for continuous improvement.
Apply post-silicon learnings to refine pre-silicon validation strategies for future projects.