Silicon Product Engineer – Manufacturing

NVIDIA•Santa Clara, CA
•$116,000 - $218,500•Hybrid

About The Position

NVIDIA is hiring a Silicon Product Engineer – Manufacturing for its Testability, Manufacturability, Reliability & Quality (TMRQ) team within the Silicon Co-Design Group. The role supports complex GPU, SoC, and CPU silicon programs from first power-on through high-volume manufacturing. The engineer validates and implements SLT/BLT production diagnostics and test specifications for silicon features, verifies POR specifications, and supports post-silicon validation. The work focuses on defining production coverage specifications and translating product requirements into effective test coverage that supports quality, yield, and manufacturing efficiency at scale. This position connects multifunctional hardware and software teams with Production Operations. The engineer will improve manufacturing workflows and products across functions, with deliberate use of AI to drive impact while managing risk. Responsibilities include developing closed-loop analysis for VF characteristics and POR expectations against production screens, validating and productizing VF/VMIN/VMAX/PVT specifications, developing and maintaining SLT/BLT testing flows, supporting silicon correlation and debugging, and driving process improvements through root-cause analysis and data analytics.

Requirements

  • Bachelor’s or Master’s degree, or equivalent experience, in Microelectronics, Electrical, Electronic, or Computer Engineering, or a related equivalent field.
  • At least 3 years of relevant industry experience in silicon post-silicon PVT validation and/or high-volume manufacturing testing for complex SoCs, GPUs, CPUs, or similar products.
  • Hands-on lab experience with silicon bring-up, lab debugging, shmoo analysis, VF characteristics, test-content bring-up, and correlation to silicon characterization, yield, and coverage optimization.
  • Strong electrical engineering fundamentals and knowledge of device physics, silicon design, statistics, STA concepts, fault analysis, sampling, and computer architecture.
  • Strong data analysis skills, a learning attitude, and prior experience working with large volumes of data.
  • Good understanding of firmware and driver structures and their interaction with hardware.
  • Problem-solving, debugging, analysis, and logical reasoning skills, supported by examples.
  • Experience with Python, BASH, Linux, and scripting.

Nice To Haves

  • Prior understanding of manufacturing test strategy for a major silicon product, such as a GPU, SoC, or CPU, from early planning through ramp to QS/production.
  • Exceptional work ethic and ability to elevate discussions to solve real problems.
  • Native use of AI tools to accelerate production testing and debugging workflows.
  • Experience with GPUs, CPUs, AI accelerators, or other large-scale SoCs, including firsthand exposure to how scale and complexity affect failure patterns and engineering demands.
  • Experience supporting multifunctional alignment on production methodologies adopted by other teams in a high-volume manufacturing environment.

Responsibilities

  • Develop and implement robust closed-loop analysis for VF characteristics and POR expectations versus production screens to improve the quality of manufacturing screening diagnostics.
  • Support VF/VMIN/VMAX/PVT specification validation and productization across Manufacturing teams and product segments.
  • Partner with silicon PVT design and characterization, IO design and validation, system feature owners, and SLT/BLT Production Operations to determine test coverage and constraints and define appropriate test conditions, content, and flows for high-volume manufacturing screens.
  • Support prototyping and fine-tune speed, power, circuits, yield, and quality for effective silicon coverage in the SLT socketed environment.
  • Support procedures for silicon correlation between production testing infrastructure and internal silicon characterization and diagnostics programs.
  • Coordinate, develop, and maintain SLT/BLT testing flows, incorporating silicon findings and correlating them to design for shift-left improvements.
  • Initiate and drive process improvements and preventative actions through root-cause analysis and data analytics.
  • Partner with software and platform teams to support and improve SLT testing infrastructure, debug knobs, and data collection features for manufacturing screens.

Benefits

  • Equity
  • Benefits
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