About The Position

In this position, you will work with the team that develops SoCs used within Apple's mobile devices. You will be specifically responsible for memory interface signal integrity for Apple SoCs, covering the span from package to board. Prior design and modeling experience with DDR or LPDDR interfaces is a must-have. You will work on the electrical and physical design of memory systems, electrical extraction and validation of packages and MLB, and collaborate with circuit and controller teams to optimize memory system design. You will also perform signal and power integrity modeling, simulation, and characterization of memory interfaces; develop and execute test plans to validate signal and power integrity; and work with product and system engineering teams to debug issues and improve product yield.

Requirements

  • Bachelor of Science degree and 10 years of industry experience.
  • Prior design and modeling experience with DDR or LPDDR interfaces.
  • Familiarity with signal and power integrity issues of memory interfaces.

Nice To Haves

  • Master of Science in Electrical Engineering and 8 years of industry experience, and/or a Ph.D.
  • Prior experience with actual product package and board design and analysis.
  • Experience developing PI/SI methodologies and performing lab correlation and validation of simulation results.
  • Excellent academic background.
  • Familiarity with lab equipment such as VNA, TDR, real-time oscilloscope, and spectrum analyzer.
  • Strong fundamentals in 3D/2D electromagnetic simulation tools and transmission line theory.
  • Proficiency in Python, strong foundational coding skills, and expertise using generative AI coding assistants to enhance productivity.

Responsibilities

  • Work on electrical and physical design of memory systems.
  • Perform electrical extraction and validation of package and MLB.
  • Collaborate with circuit and controller teams to optimize memory system design.
  • Perform signal and power integrity modeling, simulation, and characterization of memory interfaces.
  • Develop and execute test plans to validate signal and power integrity.
  • Work with product engineering and system engineering to debug issues and improve product yield.
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