In this position, you will work with the team that develops SoCs used within Apple’s mobile devices. You will be responsible for memory-interface signal integrity for Apple SoCs, covering the span from package to board. The work focuses on the electrical and physical design of memory systems, including DDR or LPDDR interfaces. You will conduct end-to-end signal-integrity and power-integrity simulation studies of memory systems, including modeling channels and power-delivery networks across die, interposer, package, PCB, and PMU, to meet tight timing and voltage specifications. You will provide feedback and guidelines to silicon floorplan, package, system-design, and other cross-functional teams, and provide optimal I/O settings and design guidelines. The role also includes feasibility studies for next-generation signaling schemes and correlation between simulation and silicon measurements.
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Job Type
Full-time
Career Level
Senior