About The Position

In this position, you will work with the team that develops SoCs used within Apple’s mobile devices. You will be responsible for memory-interface signal integrity for Apple SoCs, covering the span from package to board. The work focuses on the electrical and physical design of memory systems, including DDR or LPDDR interfaces. You will conduct end-to-end signal-integrity and power-integrity simulation studies of memory systems, including modeling channels and power-delivery networks across die, interposer, package, PCB, and PMU, to meet tight timing and voltage specifications. You will provide feedback and guidelines to silicon floorplan, package, system-design, and other cross-functional teams, and provide optimal I/O settings and design guidelines. The role also includes feasibility studies for next-generation signaling schemes and correlation between simulation and silicon measurements.

Requirements

  • Prior design and modeling experience with DDR or LPDDR interfaces.
  • Bachelor of Science degree plus 10 years of industry experience, or a Master of Science in Engineering plus 8 years of industry experience.
  • Familiarity with signal- and power-integrity issues of memory interfaces.
  • Prior experience with actual product package and board design and analysis.
  • Experience developing power-integrity and signal-integrity methodologies.
  • Experience with laboratory correlation and validation of simulation results.
  • Excellent academic background.
  • Familiarity with laboratory equipment such as VNA, TDR, real-time scope, and spectrum analyzer.
  • Strong fundamentals in 3D/2D electromagnetic simulation tools and transmission-line theory.
  • Proficiency in Python, with strong foundational coding skills and expertise leveraging generative AI coding assistants to enhance productivity.

Nice To Haves

  • Ph.D. preferred.

Responsibilities

  • Work on electrical and physical design of memory systems.
  • Perform electrical extraction and validation of package and MLB.
  • Collaborate with circuit and controller teams to optimize memory-system design.
  • Perform signal-integrity and power-integrity modeling, simulation, and characterization for memory interfaces.
  • Develop and execute test plans to validate signal and power integrity.
  • Work with product engineering and system engineering to debug issues and improve product yield.
  • Conduct end-to-end signal-integrity and power-integrity simulation studies of memory systems, including modeling channels and power-delivery networks of die, interposer, package, PCB, and PMU.
  • Provide feedback and guidelines to silicon floorplan, package, system-design, and other cross-functional teams.
  • Provide optimal I/O settings and design guidelines to cross-functional teams.
  • Perform feasibility studies for next-generation signaling schemes.
  • Correlate simulation results with silicon measurements.
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