Senior System Verification Engineer

NVIDIA•Santa Clara, CA
•$168,000 - $310,500•Onsite

About The Position

NVIDIA is hiring a Senior System Verification Engineer for its Emulation division. The role is based onsite at the company's Santa Clara, California headquarters and involves supporting multiple emulation environments using techniques such as C/C++ DPI transactors, SystemVerilog assertions and coverage, power estimation, SpeedBridges, and accelerated UVM testbenches. The engineer will bring up GPUs, SoCs, switches, and NICs on emulation; investigate system-level test failures and emulator environment issues; and bring up and verify high- and low-speed protocols. The position also involves debugging CPU–GPU coherency issues, collaborating with design, verification, power, silicon validation, performance, and software teams, working with emulation vendors to resolve issues, and writing monitors and checkers to support hardware testing and firmware/software bring-up.

Requirements

  • M.S. degree or equivalent experience in Electrical Engineering, Computer Science, Computer Engineering, or a related field.
  • At least 8 years of proven experience.
  • Proficiency in Verilog and/or VHDL, C/C++, and SystemVerilog.
  • Protocol knowledge of at least one high-speed interface, such as PCIe, CXL, NVLINK, IB, or Ethernet.
  • Knowledge of low-speed protocols such as I2C, I3C, SPI, and UART, and BMC interaction in server platforms.
  • Working knowledge of CPU–GPU coherency.
  • Experience with UVM verification environments and scripting with Perl, Python, and C/C++.
  • Familiarity with hierarchical design approaches, top-down design, and SoC and system-level verification.
  • Zebu emulation experience with SoC/CPU.

Responsibilities

  • Support multiple emulation environments using C/C++ DPI transactors, SystemVerilog assertions and coverage, power estimation, SpeedBridges, and accelerated UVM testbenches.
  • Bring up GPUs, SoCs, switches, and NICs on emulation.
  • Root-cause system-level test failures and emulator environment issues.
  • Bring up and verify high-speed protocols such as PCIe, CXL, NVLINK, IB, and Ethernet, as well as low-speed protocols such as I2C, I3C, SPI, and UART.
  • Bring up and debug issues related to CPU and GPU coherency.
  • Collaborate with Design, DV, Power, Silicon Validation, Performance, and Software teams.
  • Lead constructive debugging efforts with emulation vendors using various tools.
  • Write monitors and checkers to aid debugging in hardware tests and firmware/software bring-up.

Benefits

  • Equity
  • Benefits
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