Senior Staff Technical Program Manager, Custom Silicon

Google•Mountain View, CA

3d•$240,000 - $333,000

About The Position

In this Senior Staff Technical Program Manager (TPM) role, you will be the tactical engine and primary leader responsible for delivering Google's next-generation custom silicon. You will manage the entire lifecycle of flagship SoC programs simultaneously navigating advanced semiconductor manufacturing nodes, complex IP subsystem integration, and multi-organization hardware/software bring-up. You will blends deep semiconductor domain expertise with technical program management, excelling at bringing structure to ambiguity, managing critical paths, and driving high-velocity execution across massive cross-functional organizations. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $240000 - $333000 (USD) + 25% bonus target + equity + benefits Learn more about benefits at Google [https://www.google.com/about/careers/applications/benefits/].

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
10 years of experience in technical program management or engineering management leading semiconductors, ASIC, or custom SoC programs.
Experience driving 2 full-cycle custom SoC programs from concept through tapeout, post-silicon bring-up, qualification, and mass production.
Experience in the ASIC/SoC development lifecycle and terminology, including driving milestones, assessing technical risks, and communicating with specialized engineering teams.

Nice To Haves

Master's degree or PhD in Electrical Engineering, Computer Engineering, or related fields, or an MBA, Master’s in Engineering Management, or PMP certification.
14 years of experience leading high-volume tier-1 consumer electronics SoC/ASIC programs at advanced process nodes (e.g., 5nm, 3nm, 2nm/GAA/FinFET).
Experience tracking program-level engineering resource requirements, budgets, and project delivery timelines in collaboration with engineering leadership, finance, product management, and other relevant stakeholder teams.
Experience influencing without direct authority, resolving technical trade-offs, and aligning VP-level stakeholders across hardware, silicon, and product operations.
Track record of strategic communication and stakeholder management across multi-functional program teams.

Responsibilities

Serve as the single point of tactical program management for 2 concurrent SoC programs, establishing program governance and chairing formal executive phase-gate reviews, ensuring all exit criteria, technical performance metrics, and risk mitigation plans are achieved.
Lead cross-functional engineering orchestration across multiple functions including silicon engineering, software, product, operations, and others.
Establish and manage the critical-path schedule, proactively identifying cross-team dependencies.
Manage and track the overall program budget in close partnership with finance, product management, and engineering leaders.
Act as the primary technical communication bridge to executive leadership (VPs and Directors across hardware, silicon, and operations), delivering executive dashboards, status updates, and decision tracking.