Senior Staff Advanced Packaging Design Engineer
About The Position
Marvell’s Advanced Packaging team develops package designs and technologies for next-generation high-performance computing, AI, and networking solutions. The work addresses electrical, mechanical, thermal, and system requirements, including signal integrity, power integrity, thermal integrity, manufacturability, processability, and reliability. Designs may involve multi-chip and multi-component configurations, including 2.5D and 3D packages, co-packaged copper or optical solutions, and advanced substrates. The Senior Staff Advanced Packaging Design Engineer leads small teams of design and simulation engineers, drives package definition and architecture for performance-line products, and works with package suppliers to select technologies and ensure designs meet performance, reliability, manufacturability, and cost requirements. The role involves cross-functional collaboration with internal stakeholders, external partners, customers, chip design teams, and electrical simulation teams. The position is eligible for Marvell bonus and equity plans, including a new-hire equity grant and annual equity refreshers.
Requirements
- Extensive experience in substrate and/or board design for advanced packaging technologies.
- Solid understanding of design-for-manufacturing (DFM), reliability principles, and electrical performance considerations, with the ability to make appropriate trade-off decisions.
- Expertise in industry-standard tools and workflows, including Cadence 3DIC, ISP, APD, and SiP.
- Bachelor’s degree in Electrical Engineering or a related field and at least 5 years of relevant professional experience, or a Master’s degree or Ph.D. and at least 3 years of relevant professional experience.
- Understanding of design rules, breakout, placement and routing, signal shielding, reference planes, power distribution, and pinout development in light of overall package and system requirements.
- Experience with current-generation HBM, DDR, SerDes, D2D, D2H, ADC, DAC, PCIe, Ethernet, and related technologies.
- Strong understanding of signal and power integrity across substrate, board, package, and system levels.
- Understanding of advanced 2.5D and 3D packaging technologies, including CoWoS-S/R/L, EMIB, CPO, and CPC.
- Strong interpersonal, communication, presentation, and documentation skills, with the ability to work effectively with stakeholders across global time zones.
- Ability and willingness to learn.
Nice To Haves
- Familiarity with tools and workflows such as Cadence Sigrity, Clarity, Innovus, Virtuoso, Ansys, AutoCAD, and SolidWorks.
- Experience contributing to tool, process, and workflow development, as well as library maintenance.
- Familiarity with running and interpreting signal- and power-integrity simulations.
Responsibilities
- Lead small project teams of design and simulation engineers to deliver packaging solutions.
- Drive package definition and architecture development for performance-line products using advanced packaging technologies.
- Interface with package suppliers to select appropriate packaging technologies and ensure manufacturability while meeting performance, reliability, and cost requirements.
- Lead complex package architecture development projects involving internal stakeholders, external partners, and customers.
- Collaborate with chip design and electrical simulation teams to optimize designs.
- Contribute to tool, process, and workflow development, as well as library maintenance.
- Manage programs involving cross-functional teams.
- Run and interpret signal- and power-integrity simulations, if applicable.
Benefits
- Bonus and equity plans, including a new-hire equity grant and annual equity refreshers.
- Employee stock purchase plan with a 2-year look back.
- Family support programs.
- Mental health resources.
- Recognition and service awards.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
