Senior Mask Design Engineer - Hardware

NVIDIA•Santa Clara, CA

7d•$132,000 - $235,750

About The Position

NVIDIA is seeking a Senior Mask Layout Design Engineer to join a growing, diverse group responsible for significant high-speed mixed-signal circuit designs. The role performs physical layout for mixed-signal functions—including PLLs, high-speed SerDes, analog-to-digital converters, and ESD structures—in state-of-the-art submicron CMOS technologies using Cadence tools. The engineer works cross-functionally with ASIC and mixed-signal engineers to customize designs for integration into VLSI products, and participates in floor planning, custom layout, and verification against design rules and schematics.

Requirements

BSEE or equivalent experience.
At least 8 years of proven experience in mask and layout design.
Deep understanding of analog circuit layout concepts in submicron CMOS technologies.
Expertise with Cadence custom circuit design tools, particularly Virtuoso.
Experience running and debugging verification tools such as Dracula, Hercules, Calibre, and Prime-yield.
Ability to work effectively in a team, with good interpersonal skills, passion, and positive energy.
Proficiency in scripting languages such as Perl, Python, and SKILL.
Knowledge of DRC and LVS checking flows and ability to customize decks.

Responsibilities

Perform physical layout for mixed-signal functions such as PLLs, high-speed SerDes, analog-to-digital converters, and ESD structures in submicron CMOS technologies using Cadence tools.
Work cross-functionally with ASIC and mixed-signal engineers to customize designs for integration into VLSI products.
Participate in floor planning and custom layout.
Verify layouts against design rules and schematics.
Run and debug verification tools and work with DRC and LVS checking flows, including customizing decks.