Senior Mask Design Engineer - Hardware

NVIDIA•Santa Clara, CA
•$132,000 - $235,750

About The Position

NVIDIA is seeking a Senior Mask Layout Design Engineer to join a growing, multifaceted group responsible for high-speed mixed-signal circuit designs. The role involves physical layout of mixed-signal functions in state-of-the-art sub-micron CMOS technologies and collaboration with ASIC and mixed-signal engineers to customize designs for integration into VLSI products. The engineer will participate in floor planning, custom layout, and verification against design rules and schematics.

Requirements

  • BSEE or equivalent experience.
  • At least 6 years of proven experience in mask and layout design.
  • Deep understanding of analog circuit layout concepts in sub-micron CMOS technologies.
  • Strong proficiency with Cadence custom circuit design tools, particularly Virtuoso.
  • Experience running and debugging verification tools such as Dracula, Hercules, Calibre, and Prime-yield.
  • Ability to work effectively in a team, with good interpersonal skills, passion, and positive energy.
  • Proficiency in scripting languages such as Perl, Python, and SKILL.
  • Knowledge of DRC and LVS checking flows and the ability to customize decks.

Responsibilities

  • Perform physical layout for mixed-signal functions such as PLLs, high-speed SerDes, analog-to-digital converters, and ESD structures in sub-micron CMOS technologies using Cadence tools.
  • Work cross-functionally with ASIC and mixed-signal engineers to customize designs for integration into VLSI products.
  • Participate in floor planning and custom layout.
  • Verify layouts against design rules and schematics.

Benefits

  • Equity
  • Benefits
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service