NVIDIA is seeking a Senior Mask Layout Design Engineer to join a growing, multifaceted group responsible for high-speed mixed-signal circuit designs. The role performs physical layout for mixed-signal functions—including PLLs, high-speed SerDes, analog-to-digital converters, and ESD structures—in submicron CMOS technologies using Cadence tools. The engineer works with ASIC and mixed-signal engineers to customize designs for integration into VLSI products and participates in floor planning, custom layout, and verification against design rules and schematics.
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Job Type
Full-time
Career Level
Senior