Senior Engineer I- Yield Enhancement

Microchip•Colorado Springs, CO

2d•Onsite

About The Position

Semiconductor wafer fab device engineer with product and technology yield responsibility. Determines cause of low yields at parametric and wafer sort test, introduces new products into production, supports product and process transfers, and continuously improves product yields and reliability.

Requirements

Knowledge of basic semiconductor device physics and electronics, including transistor characteristics.
Understanding of basic digital and analog circuits, their components and how they are characterized.
Overall knowledge of the integrated circuit wafer fab manufacturing process.
Familiarity with test equipment such as semiconductor parameter analyzers, power supplies, multimeters, generators, oscilloscopes, curve tracers, etc.
Knowledge of basic statistical functions and SPC, including concept of normal distributions and Cpk’s, analysis of variance, and correlation techniques.
Ability to effectively present information to management and employees, both written and orally.
Understanding of mathematical concepts such as probability, fundamentals of geometry, algebra, trigonometry, and calculus.
Ability to effectively solve problems and help drive improvement activities. Will need to define problems/issues, collect data, establish facts, and draw valid conclusions.
BSEE +5 years of relevant experience or MSEE +2 years of relevant experience

Responsibilities

Works closely with wafer fab process engineering, product engineering, design engineering, and test engineering to understand issues/opportunities and drive yield improvement activities.
Analyzes production and engineering data to identify and resolve product yield issues.
Designs, coordinates, and analyzes IC manufacturing process experiments to improve product yields and performance.
Evaluates the parametric and product impact of process experiments.
Uses evaluation equipment such as manual probe stations, parametric evaluation equipment, bit mappers, and microscopes to collect engineering data, perform failure analysis, and detect circuit and/or fabrication problems causing failures.
Dispositions maverick material at parametric test and wafer sort.
Owns responsibility for product/technology including maintenance of yield limits, process change control, new product introduction and yield improvements.
Supports the introduction of new products and process flows into the fab and parametric test area through the creation, review, and implementation of necessary supporting specifications and process routes and flows. This may involve supporting transfers from other facilities.
Plans and completes various technical projects.
Communicates regularly with management and other functional groups within Microchip to ensure understanding of needs/problems in relation to the Yield Engineering function.