Senior Engineer, Digital Design Engineer

Analog Devices•Wilmington, MA

23h•$116,960 - $160,820•Onsite

About The Position

Analog Devices is seeking a Senior Physical Design Engineer to lead methodology improvements for physical design across complex chip and SoC programs. This role is focused on improving the scalability, reuse, efficiency, and predictability of physical implementation flows used across teams and projects. The person in this role will work closely with physical design, CAD, STA, DFT, and design teams to identify gaps in current flows and methodologies, drive practical flow improvements, and establish repeatable best practices that can be adopted across projects. A strong physical design background is important, but the primary focus of the role is methodology leadership and flow enablement rather than day-to-day block ownership.

Requirements

Methodology and Flow Development: Strong experience developing and improving physical design flows, automation, and reusable implementation methods
Physical Design Foundation: Solid background in digital physical design fundamentals, including floorplanning, placement, clock tree synthesis, routing, optimization, and timing closure
EDA Tool Experience: Experience with industry-standard physical design and signoff tools for implementation, analysis, and debug
Scripting and Automation: Strong scripting skills to automate workflows, improve productivity, and scale methodology improvements across teams
Systematic Problem Solving: Ability to analyze recurring implementation issues, identify root causes, and translate findings into durable methodology improvements
Cross-Functional Communication: Ability to work effectively across physical design, CAD, verification, and project teams to drive alignment and adoption
Technical Judgment: Ability to make sound tradeoffs across methodology quality, schedule, and implementation constraints

Nice To Haves

Experience supporting advanced-node or complex SoC implementation environments
Experience working with scripting languages such as Tcl or Python
Experience or interest in applying AI-based techniques, automation, or data-driven approaches to engineering workflows
Experience with Synopsys physical design tools preferred; comparable experience with Cadence implementation tools is also acceptable
Experience partnering across physical design, CAD, STA, DFT, and RTL/design teams

Responsibilities

Methodology Leadership: Drive improvements to physical design methodology, with a focus on flow standardization, reuse, execution efficiency, and more predictable design closure across projects
Flow Development and Automation: Own the development, refinement, and maintenance of physical design flows, scripts, and automation that reduce manual effort and improve execution quality
Best Practice Definition: Define and document physical design guardrails, recommended methodologies, and repeatable flow practices for use across teams and programs
QoR and Flow Analysis: Analyze power, performance, area, timing, and congestion outcomes to identify methodology gaps and recurring flow limitations and drive durable improvements
Cross-Functional Enablement: Partner with physical design, CAD, STA, DFT, RTL, and project stakeholders to translate program needs into practical methodology improvements and support broader adoption across teams
Debug and Root Cause Resolution: Investigate recurring implementation and convergence issues, identify the underlying flow, methodology, or design contributors, and implement robust corrective actions
Technical Guidance: Provide guidance to engineers on methodology usage, flow adoption, debugging strategies, and physical design best practices that improve consistency across projects
Implementation Support: Provide targeted implementation support as needed to validate methodology changes, troubleshoot critical flow issues, and ensure proposed improvements are grounded in real project needs