Senior Director, Board Product Development Engineering

NVIDIA•Santa Clara, CA
•$332,000 - $500,250

About The Position

NVIDIA is seeking a Senior Director, Board Product Development Engineering to oversee integration methods for advanced datacenter boards. The role coordinates engineering handoffs across packaging, PCB and materials, SMT and assembly, and test and signal integrity, considering downstream effects early so improvements deliver benefits across the chip-to-board stack. The Senior Director will own end-to-end manufacturing and test readiness for next-generation datacenter board products, ensuring build starts meet schedule and yield targets. The role leads a global Board PDE organization across PCB and fabrication, SMT/PCBA, and high-speed connector and signal integrity, and establishes integration oversight, qualification gates, and requirements at domain boundaries. It also leads reliability and yield performance, supports manufacturing partners, and represents chip-to-board engineering across NVIDIA Operations, Engineering, and Executive teams. The position requires extensive experience taking complex electronics from design through NPI to high-volume manufacturing, broad technical expertise across the chip-to-board stack, and the ability to build cross-functional processes and influence domain owners. International travel of approximately 20%, primarily to manufacturing partners in Asia, is expected. The expected base salary range is $332,000–$500,250, with eligibility for equity and benefits.

Requirements

  • Bachelor’s degree in Electrical Engineering, Materials Science, or a related technical field, or equivalent experience.
  • 15+ years of experience in product, manufacturing, or operations engineering for high-complexity electronics.
  • 8+ years leading engineering teams and 5+ years leading leaders in a global, cross-matrixed organization.
  • Track record of taking complex board and system products from design through NPI to high-volume manufacturing, with ownership of schedule, yield, and quality outcomes.
  • Comprehensive technical knowledge of the chip-to-board stack, including advanced packaging and flip-chip BGA, high-density and high-layer-count PCB fabrication, SMT and assembly process qualification, and board-level reliability.
  • Expertise in high-speed signal integrity and manufacturing testing, including BERT, channel margining, structural and functional test coverage, and diagnostic and tester board development.
  • Demonstrated success building cross-functional processes and sign-off gates that hold up under schedule pressure, and influencing domain owners without owning their qualification.
  • Experience collaborating with ODM, CM, OSAT, and PCB fabrication suppliers to qualify new methods before production.
  • Excellent executive communication skills, including distilling ambiguous technical information into concise, decision-ready recommendations for technical and non-technical audiences.
  • Comfort working in fast-paced, ambiguous environments with constantly changing technology.
  • Willingness to travel internationally approximately 20%, primarily to manufacturing partners in Asia.

Nice To Haves

  • Master’s or PhD degree.
  • Full accountability for board manufacturing processes and yields on AI or datacenter platforms at hyperscale.
  • Depth in next-generation interconnect and packaging, including 112G/224G SerDes correlation, fine-pitch BGA, and 2.5D/3D packaging, taken through assembly into high-volume manufacturing at healthy first-pass yield.
  • Track record of validating new materials, fabrication technologies, and board manufacturing processes into high-volume manufacturing ahead of industry standards.
  • Proven board-level yield improvement, including defect baselines, process-to-yield correlation, and permanent corrective action for systemic excursions.
  • Success scaling a technical organization from a small core into a global, multi-site team.

Responsibilities

  • Design, implement, and institutionalize integration readiness for next-generation datacenter board products, owning manufacturing and test readiness end to end.
  • Guide functional teams in developing cross-boundary techniques before silicon and stackup freeze, including warpage-tolerant DFM and reflow, high-speed stackup impedance and CTE control, and early pad-map and fabrication-method decisions.
  • Build, lead, and develop a global Board PDE organization across PCB and fabrication, SMT/PCBA, and high-speed connector and signal integrity.
  • Establish integration oversight across the chip-to-board stack, define domain-boundary entry and exit requirements, and lead qualification gates between domains.
  • Collaborate with Operations Test Engineering and Signal Integrity to establish test coverage and manufacturing test-flow requirements, including for tester and diagnostic boards.
  • Lead reliability and yield performance throughout the stack, investigate excursions and root causes, and address DFx and alternate-component gaps with factory planning and design teams.
  • Support CM, ODM, OSAT, substrate, and PCB fabrication partners in producing datacenter products.
  • Represent chip-to-board engineering across NVIDIA Operations, Engineering, and Executive teams.
  • Travel internationally approximately 20%, primarily to manufacturing partners in Asia.

Benefits

  • Competitive salaries and a generous benefits package.
  • Equity.
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