Senior Director, AMS Layout Engineering

Upscale, Inc. • Headquarters, KY

2d • $306,000 - $337,000

About The Position

Upscale, Inc. is building a SerDes engineering team to support next-generation AI data center connectivity. The Senior Director, AMS Layout Engineering will lead the physical implementation of advanced high-speed analog and mixed-signal circuits for next-generation SerDes technologies. This strategic technical leadership role calls for deep expertise in advanced-node analog layout, understanding of high-speed PHY design challenges, and a track record of building and developing high-performing engineering teams.

The role partners with analog and digital design, process technology, package, and silicon validation teams to translate electrical and physical requirements into robust, high-performance silicon implementations. It also establishes methodologies, design practices, and organizational capabilities to scale SerDes development efforts. The position drives execution across concurrent development efforts while maintaining standards for quality, schedule, and engineering productivity.

The salary range is $306,000–$337,000 per year. Placement within the range depends on experience, skills, and impact.

Requirements

• BS, MS, or PhD in Electrical Engineering, Microelectronics, or a related field.
• Proven experience delivering advanced-node analog or mixed-signal designs at 5nm or below, or equivalent leading-edge process technologies.
• Strong understanding of layout techniques for high-speed SerDes and PHY circuits, including transmitters, receivers, clocking circuits, PLLs, DLLs, and other timing-critical analog blocks.
• Demonstrated understanding of advanced process design rules, parasitic extraction, physical verification, device matching, signal integrity, and power integrity.
• Experience leading complex silicon development programs from early floorplanning and layout planning through physical verification, tape-out, and silicon bring-up.
• Proven ability to recruit, develop, mentor, and retain engineering talent while building an effective, collaborative team.
• Excellent communication skills and ability to influence technical decisions across multidisciplinary engineering organizations.

Nice To Haves

• Direct experience developing and delivering 100G+ per-lane SerDes PHYs.
• Experience leading AMS layout teams for high-speed connectivity products targeting AI accelerators, high-performance computing, networking, or advanced data center applications.
• Deep expertise in layout-sensitive circuit optimization, including parasitic management, coupling and crosstalk mitigation, clock distribution, supply integrity, and electromagnetic interactions.
• Experience with advanced packaging, chiplet integration, and high-bandwidth die-to-die interfaces.
• A strong track record of establishing scalable engineering methodologies and delivering complex, high-performance silicon across multiple technology generations.
• Experience building engineering teams in a fast-paced, high-growth semiconductor organization.

Responsibilities

• Lead AMS layout engineering for advanced high-speed SerDes PHYs, including physical implementation, optimization, and sign-off across critical analog and mixed-signal circuit blocks.
• Drive advanced-node layout solutions addressing complex design rules, restrictive patterning requirements, parasitic effects, device matching, signal integrity, power integrity, and electromigration.
• Partner with circuit designers to optimize layout-sensitive performance, including bandwidth, jitter, noise, matching, power consumption, and silicon robustness at 100G+ per-lane data rates.
• Establish and improve layout methodologies, design guidelines, verification flows, and quality standards to support predictable execution and first-silicon success.
• Collaborate with AMS design, digital implementation, technology, package, and silicon validation teams to resolve integration challenges and deliver competitive silicon.
• Build and scale the AMS layout organization through hiring, technical mentorship, talent development, and succession planning.
• Drive project planning, resource allocation, technical reviews, and execution across multiple concurrent development efforts.
• Foster technical depth, accountability, continuous improvement, and collaboration across geographically distributed teams.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior