Senior Engineer, Digital Verification

Analog Devices•Durham, NC

About The Position

As a Senior Design Verification Engineer at Analog Devices, you will lead verification planning and execution for complex digital and mixed-signal designs. Working independently with minimal supervision, you will architect advanced verification environments, mentor junior engineers, and advance verification approaches. You will address diverse technical challenges and represent Analog Devices in technical forums and customer interactions while collaborating across organizational boundaries to ensure product quality and reliability.

Requirements

Expert-level knowledge of SystemVerilog and Universal Verification Methodology (UVM) to architect comprehensive verification environments.
Demonstrated mastery developing advanced test benches for complex mixed-signal product verification.
Proven ability to develop and implement sophisticated test strategies and detailed coverage analysis methodologies.
Advanced proficiency in scripting languages such as Python, Perl, and TCL for verification automation.
Exceptional analytical and debugging skills for complex issues across digital and mixed-signal domains.
Expert-level experience with constrained-random and assertion-based verification techniques.
Comprehensive understanding of mixed-signal design principles and advanced verification methodologies.
Ability to influence technical direction and methodology adoption across verification teams.
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
4–8 years of relevant digital/mixed-signal IC verification experience.

Nice To Haves

Master's degree in Electrical Engineering, Computer Engineering, or a related field.

Responsibilities

Architect and implement comprehensive verification strategies for complex digital and mixed-signal designs.
Drive development of UVM-based verification environments for sophisticated mixed-signal products.
Establish and oversee verification metrics, including code and functional coverage goals across multiple projects.
Lead debugging efforts for complex design issues spanning digital and mixed-signal domains.
Provide technical guidance and mentorship to junior verification engineers.
Collaborate with design teams on verification planning and issue resolution.
Lead silicon bring-up and post-silicon validation activities.
Contribute to verification methodology improvements and development of best practices.