Senior Analog Layout Designer

OLIX•Austin, TX

1d•$292,000 - $292,000

About The Position

As a Senior Analog Layout Designer, you will be working to create layouts for RX/TX lane macros and support lane-level integration.

7+ years of Analog Layout Design experience
Understanding of the Semiconductor Fabrication process and device/layout cross-sections
Minimum 3 years of experience with TSMC FinFET processes: 2nm, 3nm, 4nm, 5nm
Several tape-outs with FinFET processes
Expert-level knowledge of block/macro floor-planning, block integration, routing, clock distribution, and power grid implementation
Expert-level knowledge of layout considerations for device matching, symmetry, parasitic reduction, and noise isolation
Expert-level knowledge of running and debugging LVS/ERC/DRC/Density/DFM/Antenna verifications
Expert-level knowledge of EM/IR analysis
Expert-level knowledge of Cadence Virtuoso and Calibre/Pegasus verification tools
Understanding of ESDs and Clamps, and their layout considerations
Understanding of layout effects such as LOD/OSE/PSE/WPE/MBE/LDE
Experience with lane integration and tape out versifications
Experience working with revision-controlled design libraries
Good communication skills

Create layouts for RX/TX lane macros
Support lane-level integration
Own major layout macros (ADC, DAC, TIA, CDR, PLL, BGB, LDO)
Perform block/macro floor-planning, block integration, routing, clock distribution, and power grid implementation
Implement layout considerations for device matching, symmetry, parasitic reduction, and noise isolation
Run and debug LVS/ERC/DRC/Density/DFM/Antenna verifications
Perform EM/IR analysis
Work with revision-controlled design libraries
Perform lane integration and tape out verifications