PMU Analog Layout Designer

Apple•Cupertino, CA

About The Position

The PMU team seeks layout engineers across a variety of skill levels to work on high-performance analog IPs and complex chip-level layouts for Apple products. The role involves delivering PDV-clean layouts in deep-submicron CMOS technologies, collaborating with circuit design teams on work planning and layout trade-offs, and using advanced CAD tools and mask-design knowledge to produce correct, robust layouts that meet stringent matching, area, and power requirements. The position is part of a dynamic, collaborative environment involving analog and digital design, integration, CAD, circuit engineering, and technology engineering teams.

Requirements

  • Bachelor of Science degree.
  • At least 3 years of relevant industry experience.

Nice To Haves

  • Relevant experience in analog/mixed-signal layout design of submicron CMOS circuits.
  • Experience building tight-matching, low-capacitance, low-power analog blocks, resistors, capacitors, high-voltage devices, pad IOs, and ESD structures.
  • Experience with custom and standard-cell-based floor planning and hierarchical layout assembly.
  • Understanding of IR drop, RC delay, electromigration, self-heating, and cross capacitance.
  • Relevant experience with analog and DFM practices.
  • PMU and chip-level layout experience.
  • Scripting experience in PERL or SKILL CODE.
  • Excellent communication skills and ability to work with multifunctional teams.
  • Proficiency interpreting Calibre, DRC, ERC, and LVS reports.
  • Knowledge of MENTOR GRAPHICS or CADENCE layout tools.
  • Master's degree.

Responsibilities

  • Deliver PDV-clean layouts in deep-submicron CMOS technologies.
  • Work with circuit design teams to plan and schedule work and negotiate necessary layout trade-offs.
  • Recognize failure-prone circuit and layout structures.
  • Run the complete set of available design verification tools at both mega-cell and chip level.
  • Interpret LVS, DRC, and ERC reports to identify an efficient path to layout completion.
  • Work closely with circuit design teams to exceed engineering specifications and expectations.
  • Use advanced CAD tools and mask-design knowledge to deliver correct, robust layouts that meet matching, area, and power requirements.
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