Semiconductor Device Modeling Engineer

Intel•Hillsboro, OR

5d•Onsite

About The Position

The Semiconductor Device Modeling Engineer will join Intel’s Compact Device Modeling Group (CDMG), part of the Design Technology Platform organization. CDMG supports Intel’s design, development, and manufacturing services and co-optimizes process technology to help customers bring products to market. The role supports compact modeling activities for Intel’s new technologies and enables design teams to develop products for data-centric applications.

Requirements

Master’s degree in Electrical Engineering or a related discipline and at least 5 years of semiconductor industry experience, or a Ph.D. in Electrical Engineering or a related discipline and at least 3 years of semiconductor industry experience.
At least 3 years of hands-on experience with BSIM-CMG and other compact models for transistor modeling at advanced nodes, such as FinFET and GAA.
Proficiency with extraction tools such as ICCAP and MBP, and commercial simulators such as HSPICE and Spectre.
Strong background in IV/CV fitting, model retargeting, and corner/statistical variation modeling.
Experience developing LLE models for FinFET or GAAFET technologies.
Python scripting skills for automation and documentation.

Nice To Haves

Ph.D. in Electrical Engineering or a related discipline and 8 or more years of semiconductor industry experience.
Deep expertise in compact modeling, including layout-dependent effects and their impact on circuit performance.
Experience with modeling using Open Model Interface (OMI).
Strong understanding of process flow, layout, and basic circuit design and simulation.
Experience modeling self-heating effects and their influence on device and circuit performance.
Experience developing methodologies for device targeting and benchmarking circuits, including corners and statistical variation models.
Demonstrated technical leadership and ability to collaborate across multiple teams and geographies.
Experience with machine learning algorithms and their application to data analysis and compact model development.

Responsibilities

Support compact modeling activities for Intel’s new technologies.
Contribute to co-optimizing Intel process technology to support customers’ diverse design needs.