RTL Design & Integration Engineer

Advanced Micro Devices, Inc•San Jose, CA

8d•Hybrid

About The Position

As a key member of AMD’s FPGA Product development team, you will have various responsibilities in the technical execution of Adaptive & Embedded Computing Group (AECG) device programs from conception & planning to productization. You will leverage modern RTL design methodologies, advanced EDA tools, and AI-driven automation in supporting PPA, cost and schedule optimized Silicon implementation and first-time-right SW solution.

Requirements

Expertise in RTL design (Verilog/SystemVerilog), including digital/analog block implementation.
Understanding of VLSI design flow, from RTL through Physical Design and GDSII.
Familiarity with Physical Implementation processes: floorplanning, synthesis, P&R, STA.
Experience with EDA tools (Synopsys Design Compiler, Primetime, VCS; Cadence Virtuoso).
Knowledge of UVM/OVM verification, simulation environments, and debugging.
Proficiency in scripting (Perl, Tcl, Python, Shell) for design automation.
Excellent communication skills and ability to thrive in a fast-paced, global environment.
Bachelor’s or Master’s in Computer Engineering or Electrical Engineering.

Nice To Haves

Understanding of FPGA architecture and usage models is a plus.

Responsibilities

Collaborate with architects, hardware engineers, and SW-FW engineers to understand the product requirements and IP features.
Build early-stage RTL designs based on product and architecture intent driving Silicon and Solution co-development.
Build and enhance AI-driven infrastructure to accelerate IP integration and improve development timelines.
Apply data-driven methodologies to align engineering teams across next-generation products and technology nodes.
Support functional simulation and software quality checks, ensuring robust verification coverage.
Partner with global teams to achieve seamless integration and delivery.