RFIC Layout Engineer

Apple • San Diego, CA

2h

About The Position

The Wireless SoC Radio Team designs energy-efficient CMOS radios, spanning RF through bits. The team develops RF, analog, and mixed-signal blocks, including RF front-end amplifiers, data converters, baseband filters, baseband and RF phase-locked loops, crystal oscillators, and band gap references.

As an RFIC Layout Engineer, you will be a key member of an RFIC team, researching, designing, and bringing next-generation wireless technologies into high-volume production in advanced CMOS technology nodes.

Requirements

• Bachelor of Science degree.
• 10 or more years of relevant industry experience.
• FinFET experience.

Nice To Haves

• Experience in custom RF/analog layout for radio transceivers, with extensive knowledge of deep sub-micron CMOS.
• Knowledge of layout techniques for device matching, minimizing parasitics, RF shielding, and high-frequency routing.
• Solid understanding of RC delay, electromigration, and coupling.
• Understanding of guard rings, DNW, PN junctions, and advanced process effects such as LOD and WPE.
• High proficiency interpreting CALIBRE DRC, ERC, and LVS in FinFET technology.
• Knowledge of Cadence layout tools.
• Excellent communication skills.
• Scripting skills in Perl or SKILL.

Responsibilities

• Research, design, and help bring next-generation wireless technologies into high-volume production in advanced CMOS technology nodes.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior