RFIC Layout & Design Automation

Keysight Technologies, Inc.•Calabasas, CA

About The Position

Keysight is seeking an R&D Engineer to develop next-generation layout and design automation technologies for RFIC, analog, and microwave applications. The role focuses primarily on RFIC layout, parameterized layout generation, and layout automation, complemented by Python-based automation, simulation-driven optimization, and machine learning. The engineer will work with RFIC designers and software engineers to deliver production-quality design automation capabilities.

Requirements

MS or PhD in Electrical Engineering, Computer Engineering, Computer Science, EDA/CAD, or a related discipline.
Strong hands-on experience in RFIC, analog, microwave, or mixed-signal layout and design.
Experience with RFIC passive and active components such as inductors, transformers, transmission lines, filters, matching networks, mixers, and power amplifiers.
Deep hands-on experience in parameterized layout generation and PCell development, including automated generation of design-rule-compliant layouts from circuit and design parameters.
Strong understanding of semiconductor layout methodologies, design rules, physical verification, parasitics, and EM-aware design practices.
Strong programming experience in Python.
Experience with circuit and/or EM simulation, design optimization, and semiconductor design automation tools.
Strong problem-solving and software development skills, with the ability to translate complex design workflows into scalable automation solutions.

Nice To Haves

C++ experience.
Experience with machine learning frameworks such as PyTorch, TensorFlow, or scikit-learn.
Knowledge of surrogate modeling, design-space exploration, Bayesian optimization, or other optimization techniques.
Familiarity with ADS, Cadence Virtuoso, EM simulation tools, or similar EDA platforms.
Experience applying machine learning or intelligent optimization to semiconductor design workflows.
Experience working in Agile software development environments.

Responsibilities

Develop RFIC, analog, and microwave layouts, including parameterized and reusable layout structures.
Develop automated parameterized layout generation capabilities that translate circuit and design parameters into design-rule-compliant physical layouts.
Design and implement layout automation, including geometry generation, placement, routing, symmetry, design-rule constraints, and EM-aware design.
Integrate layout generation with circuit and EM simulation to support parameter exploration, design-space analysis, and optimization.
Develop Python-based tools and scalable software for automated layout and design workflows.
Apply optimization and machine learning techniques, including surrogate modeling and Bayesian optimization, to accelerate design exploration and convergence.
Collaborate with RFIC designers and software engineers to deliver production-quality design automation capabilities.