RF/Analog/Mixed Signal Engineer

Apple • Austin, TX

2d • Onsite

About The Position

Apple Inc. has an available RF/Analog/Mixed Signal Engineer position in Austin, Texas. The role involves defining block- and chip-level specifications for high-speed, low-power communication; designing transistor-level analog and mixed-signal circuits; and verifying circuit functionality and performance through block-level simulations and analyses. The engineer designs clock distribution and clock-and-data-recovery (CDR) circuits, uses SERDES systems to determine circuit needs, and investigates power-efficient clocking architectures.

The position also includes designing and optimizing duty-cycle correctors and phase interpolators, including comparator and sampler design and layout optimization. The engineer designs a 100 MHz reference clock receiver that delivers the clock from the pad to the PLL with minimal jitter, uses 50-ohm termination to avoid reflections, and addresses headroom issues associated with a supply-voltage reduction from 1.2 V to 1.06 V. Chips are tested across process, temperature, and voltage conditions to assess robustness and functionality. The position is 40 hours per week.

Requirements

• Master’s degree or foreign equivalent in Electrical Engineering, Computer Engineering, Electronics Engineering, or a related field.
• Education and/or experience must include designing and analyzing high-speed analog and mixed-signal building blocks, including PLL, LDO, ADC, DAC, and phase interpolator.
• Education and/or experience must include leveraging end-to-end SERDES systems, including TX/RX design, channel characteristics, and equalization techniques.
• Education and/or experience must include utilizing RTL/Verilog modeling to develop mixed-signal block models for system-level design verification.
• Education and/or experience must include MATLAB modeling for SERDES performance analysis, including jitter tolerance and equalization analysis.
• Education and/or experience must include leveraging spectrum analyzers, oscilloscopes, and signal generators for post-silicon validation and testing.
• Education and/or experience must include analog and high-speed circuit layout techniques, including matching and noise considerations, to ensure post-layout performance.
• Education and/or experience must include signal processing for design and analysis, including filtering, equalization, and spectral analysis.
• Education and/or experience must include using Python and Shell scripting to automate design simulations and data analysis.
• Education and/or experience must include design validation tools, including EMIR, static timing analysis, and DFT, to ensure design robustness and manufacturability.

Responsibilities

• Define and document block- and chip-level functional and performance specifications aligned with system-level goals for high-speed, low-power communication.
• Design complex analog and mixed-signal circuits at the transistor level while meeting power, performance, and area constraints; use Virtuoso to test designs with different options and environments.
• Conduct block-level simulations and analyses to verify circuit functionality and power, performance, and area requirements.
• Design clock-distribution circuits and CDR circuits for high-speed clock delivery and low-error data recovery, using SERDES systems to determine circuit requirements.
• Investigate clocking architectures that reduce semiconductor power consumption.
• Design and optimize duty-cycle correctors and phase interpolators, including precise comparators and samplers, layout optimization, and improvements to phase-interpolator linearity and step size.
• Design a 100 MHz reference clock receiver that delivers the clock from the pad to the PLL with minimal jitter contribution, uses 50-ohm termination to avoid reflections, and addresses headroom degradation associated with a supply-voltage reduction from 1.2 V to 1.06 V.
• Test chips across process, temperature, and voltage conditions to evaluate robustness and functionality.
• Perform post-silicon validation and testing and automate design simulations and data analysis.

What This Job Offers

• Job Type: Full-time