PhD Research Internship 2027

Riverlane•Boston, MA
•Hybrid

About The Position

Riverlane is hiring a full-time, fixed-term PhD Research Intern for its Boston-area research team. The intern will investigate the simulation, execution, and decoding of quantum error-correction (QEC) experiments, developing a research project with a dedicated supervisor. The work sits at the intersection of quantum error correction, computer simulation, computer architecture, and hardware-software co-design. Depending on the project, research may involve quantum hardware noise models, efficient QEC experiment simulation, decoding or predecoding methods, classical resource modeling for fault-tolerant quantum programs, or distributing decoding workloads across computing-system layers. The intern will work with quantum scientists and engineers at Riverlane’s office in Cambridge, Massachusetts. The internship is full-time for 10 to 12 weeks, and the work will contribute to understanding how QEC systems can meet the performance needs of increasingly large quantum computers. The role is hybrid and pays $55.70 per hour, DOE. Reasonable role-related expenses, such as approved travel to meetings or conferences, will be reimbursed. Travel to Cambridge at the beginning or end of the internship and accommodation during the internship are not covered. The intern must be authorized to work in the United States for the internship’s duration and must assign ownership of intellectual property produced during the internship to Riverlane.

Requirements

  • Currently pursuing a PhD in Physics, Mathematics, Computer Science, Computer Engineering, Electrical Engineering, or another related technical field.
  • Research experience in at least one of the following: running quantum circuits on quantum hardware; decoding algorithms or quantum error-correcting codes; or developing computational models, simulations, or research software.
  • Proficiency in Python, C, C++, or another relevant programming language.
  • A strong understanding of computer systems and architecture.
  • Excellent analytical and problem-solving skills.
  • Ability to communicate complex technical ideas clearly.
  • Ability to take initiative and work effectively with researchers and engineers from different disciplines.
  • Authorization to work in the United States for the duration of the internship.
  • Availability to work full-time for 10 to 12 weeks.
  • If using CPT, OPT, or another form of student employment authorization, responsibility for obtaining the necessary approval before the start date.

Nice To Haves

  • Research experience with qLDPC or surface codes.
  • Familiarity with QEC decoding or predecoding techniques.
  • Experience exploring classical resource requirements for fault-tolerant quantum computing.
  • Experience with scientific computing, quantum circuit simulation, or QEC simulation tools.
  • Contributions to academic publications, open-source software, or collaborative research projects.
  • Experience with hardware-software or compiler-hardware co-design.
  • Understanding of latency, bandwidth, or power constraints affecting quantum control and decoding systems.

Responsibilities

  • Develop algorithms, simulations, or architectural models to evaluate potential approaches.
  • Investigate methods to reduce compute, communication, memory, latency, or power requirements associated with QEC.
  • Explore trade-offs between decoding performance, logical error suppression, and classical resource requirements.
  • Collaborate with quantum scientists and engineers across QEC theory, decoding, software, and hardware.
  • Analyze results and communicate findings through technical discussions, presentations, and written reports.
  • Produce clear, reproducible research code and supporting documentation.

Benefits

  • Reimbursement of reasonable role-related expenses, such as approved travel to meetings or conferences.
  • Free snacks and refreshments.
  • Regular social and cultural events.
  • A diverse and collaborative working environment.
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