PhD Engineering Internship 2027

Riverlane • Boston, MA

10h • Hybrid

About The Position

Riverlane is hiring a PhD Engineering Intern for a 10–12-week, full-time, fixed-term internship based at its US office in Cambridge, Massachusetts. The role focuses on classical computing architectures needed to support scalable, fault-tolerant quantum computers, at the intersection of quantum error correction (QEC), computer architecture, and hardware-software co-design. Depending on the project, the intern may investigate QEC decoding or predecoding methods, model classical resources required by fault-tolerant quantum programs, or study how decoding workloads can be distributed across computing systems.

The intern will work with Riverlane researchers and engineers and receive support from a dedicated supervisor. The work will contribute to understanding how QEC systems can meet the performance requirements of increasingly large quantum computers. The position is hybrid and pays $55.70 per hour, depending on experience. Reasonable role-related expenses, such as approved travel to meetings or conferences, will be reimbursed; travel to Cambridge at the beginning or end of the internship and accommodation are not covered. Interns must assign ownership of intellectual property produced during the internship to Riverlane.

Requirements

• Currently pursuing a PhD in Computer Science, Computer Engineering, Electrical Engineering, Physics, Mathematics, or another related technical field.
• Research experience in at least one of these areas: quantum error correction or fault-tolerant quantum computing; computer architecture or quantum-classical systems; decoding algorithms or error-correcting codes; FPGA, ASIC, or digital hardware design.
• Experience developing computational models, simulations, or research software.
• Proficiency in Python, C, C++, or another relevant programming language.
• Strong understanding of computer systems and architecture.
• Excellent analytical and problem-solving skills.
• Ability to communicate complex technical ideas clearly.
• Ability to take initiative and work effectively with researchers and engineers from different disciplines.
• Authorization to work in the United States for the duration of the internship.
• Availability to work full-time for 10 to 12 weeks.

Nice To Haves

• Research experience with quantum LDPC codes or surface codes.
• Familiarity with QEC decoding or predecoding techniques.
• Experience exploring classical resource requirements of fault-tolerant quantum computing.
• Experience with hardware-software or compiler-hardware co-design.
• Experience with RTL, SystemVerilog, FPGA, or ASIC development workflows.
• Understanding of latency, bandwidth, or power constraints affecting quantum control and decoding systems.
• Experience with scientific computing, quantum circuit simulation, or QEC simulation tools.
• Contributions to academic publications, open-source software, or collaborative research projects.

Responsibilities

• Contribute to a research project focused on classical systems and architectures for scalable quantum error correction.
• Investigate methods to reduce compute, communication, memory, latency, or power requirements associated with QEC.
• Develop algorithms, simulations, or architectural models to evaluate potential approaches.
• Explore trade-offs between decoding performance, logical error suppression, and classical resource requirements.
• Consider implementation of QEC workloads across software, FPGA, ASIC, or other computing architectures.
• Collaborate with researchers and engineers across QEC theory, decoding, software, and hardware.
• Analyze results and communicate findings through technical discussions, presentations, and written reports.
• Produce clear, reproducible research code and supporting documentation.

Benefits

• Reimbursement of reasonable approved expenses incurred as part of the role, such as travel to meetings or conferences.
• Free snacks and refreshments.
• Regular social and cultural events.
• Reasonable accommodations for applicants with disabilities.

What This Job Offers

• Job Type: Full-time
• Career Level: Intern
• Education Level: Ph.D. or professional degree