Engineering Internship 2027

Riverlane • Boston, MA

9h • $35 - $42 • Hybrid

About The Position

Riverlane is hiring an engineering intern to investigate the classical computing architectures needed to support scalable, fault-tolerant quantum computers. The project sits at the intersection of quantum error correction (QEC), computer architecture, and hardware-software co-design. Depending on the project, the intern may explore efficient decoding or predecoding methods, model classical resources needed by fault-tolerant quantum programs, or investigate distributing decoding workloads across computing-system levels.

The intern will work with Riverlane researchers and engineers in Cambridge, Massachusetts, with support from a dedicated supervisor. The work will contribute to understanding how QEC systems can meet the performance requirements of increasingly large quantum computers. The internship is full-time for 10 to 12 weeks and is based at Riverlane’s US office in Cambridge, Massachusetts. It is a fixed-term internship with hybrid work arrangements. Compensation is $35–$42 per hour, depending on experience. Reasonable approved expenses incurred as part of the role, such as travel to meetings or conferences, will be reimbursed; travel to and from Cambridge at the start or end of the internship and accommodation are not covered.

Requirements

• Be a current student at the time of application, studying toward a Bachelor’s degree (second year or later) or a Master’s degree.
• Have experience in at least one of the following areas: quantum error correction or fault-tolerant quantum computing; computer architecture or quantum-classical systems; decoding algorithms or error-correcting codes; FPGA, ASIC, or digital hardware design.
• Have experience developing computational models, simulations, or research software.
• Be proficient in Python, C, C++, or another relevant programming language.
• Have a strong understanding of computer systems and architecture.
• Have excellent analytical and problem-solving skills.
• Be able to communicate complex technical ideas clearly.
• Be able to take initiative and work effectively with researchers and engineers from different disciplines.
• Be legally authorized to work in the United States for the duration of the internship and obtain any required student-employment authorization before the start date.
• Be available to work full-time for 10 to 12 weeks.
• Sign an agreement assigning ownership of intellectual property produced during the internship to Riverlane.

Nice To Haves

• Experience researching quantum LDPC or surface codes.
• Familiarity with QEC decoding or predecoding techniques.
• Experience exploring classical resource requirements of fault-tolerant quantum computing.
• Experience with hardware-software or compiler-hardware co-design.
• Experience with RTL, SystemVerilog, FPGA, or ASIC development workflows.
• Understanding of latency, bandwidth, or power constraints affecting quantum control and decoding systems.
• Experience with scientific computing, quantum circuit simulation, or QEC simulation tools.
• Contributions to academic publications, open-source software, or collaborative research projects.

Responsibilities

• Contribute to a research project focused on classical systems and architectures required for scalable quantum error correction.
• Investigate methods to reduce compute, communication, memory, latency, or power requirements associated with QEC.
• Develop algorithms, simulations, or architectural models to evaluate potential approaches.
• Explore trade-offs between decoding performance, logical error suppression, and classical resource requirements.
• Consider how QEC workloads could be implemented across software, FPGA, ASIC, or other computing architectures.
• Collaborate with researchers and engineers working across QEC theory, decoding, software, and hardware.
• Analyze results and communicate findings through technical discussions, presentations, and written reports.
• Produce clear, reproducible research code and supporting documentation.

Benefits

• Reimbursement of reasonable approved expenses incurred as part of the role, such as travel to meetings or conferences.
• Free snacks and refreshments.
• Regular social and cultural events.
• Diverse and collaborative working environment with experts across software and hardware development, quantum information theory, physics, mathematics, and other technical fields.

What This Job Offers

• Job Type: Full-time
• Career Level: Intern